ELECTRICAL CHARACTERISTICS OF LOW VOLTAGE ...

TIA PN-4584
Revision 1.2
ANNEX B (informative)
B.1 Compatibility with other interface standards
The LVDS interface circuit is not intended for direct inter-operation with other interface
electrical characteristics such as TIA/EIA-422-B, TIA/EIA-485-A, TIA/EIA-612, ITU-T
(Formerly CCITT) Recommendation V.11, emitter coupled logic (ECL) or PECL.
Under certain conditions, inter-operation with circuits of some of the above interfaces
may be possible but may require modification in the interface or within the equipment,
or may require limitations on certain parameters (such as common-mode range);
therefore, satisfactory operation is not assured, and additional provisions not specified
herein may be required.
B.1.1 Generator output levels (Figure B.1)
A generator complying to this Standard features a differential current source capable of
delivering a loop current in the range of 2.5 mA to 4.5 mA. When loaded with a
100 Ω load, the resulting differential voltage across the resistor will be at least 250 mV
and less than 450 mV (V t ). The center point is typically +1.2 V (V OS ). These voltages
are depicted in Figure B.1.
Any balanced receiver device that guarantees and input range of at least 0V to +2.4V,
and thresholds of 200 mV or less may directly inter-operate with the generator specified
by this Standard and total noise is less than 50 mV.
The balanced receiver specified by this Standard may inter-operate with other balanced
generators specified by other standards along as the balanced generator does not
violate the maximum receiver input voltage range, and develops a differential voltage of
at least 100 mV, and not greater than 600 mV. Inter-operation with generators that
provide a greater differential voltage may also be possible with the use of an
attenuating circuit. The actual arrangement of such circuits is beyond the scope of this
annex.
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