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Mixing SMBus & I 2 C - design for interoperability<br />
Controllers & Sensor Devices<br />
<strong>Intel</strong><br />
Developer<br />
Forum<br />
Spring 2001<br />
• Design devices to sink 4mA, min.<br />
• Design devices to output I 2 C ‘1’ and SMBus ‘0’ levels.<br />
• Design devices to accept SMBus ‘1’ and I 2 C ‘0’ levels.<br />
• Output data with SMBus hold time [THD;DAT = 300 ns]<br />
• Accept data with I 2 C hold time [THD;DAT = 0 ns]<br />
• Recommended that new fixed-address sensor devices<br />
be discoverable per the SMBus 2.0 specification<br />
Support ‘Dual Protocol’ in new<br />
Management Controllers and Sensor Devices<br />
Copyright © 2001 <strong>Intel</strong> Corporation.<br />
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