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SMBus & I 2 C
Design Recommendations
Management Controller Support for
‘Stuck 0 clear’
– A simple slave that misses a clock on a read transaction
can be left holding the data line low
– Detection requires ability to monitor the bus for a stuck 0
data condition
– Therefore, useful for firmware to be able to directly read state
of bus pins
– Can free bus by clocking it until transfer completes or data
goes to ‘1’
– Requires ability for firmware to clock bus, outputting a ‘1’
until bus clears
– I 2 C/SMBus controller state machine must be able to be
‘overridden’ so that it ignores 0 already on bus.
– One approach: allow firmware to drive bus pins as GPIO
Intel
Developer
Forum
Spring 2001
See SMBus 2.0 spec for more info
Copyright © 2001 Intel Corporation.
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