FALCOM JP18 GPS receiver - Hardware manual

THIS DOCUMENT IS AVAILABLE AT HTTP://WWW.FALCOM.DE/ 

JP18 GPS-Receiver 

Lead-free products 

Hardware description 

Version 1.0.7; Last Modified: Monday 25 January 2010

JP18 FALCOM GPS RECEIVER VERSION 1.0.7 

Table of contents 

1 INTRODUCTION.......................................................................................5 

1.1 General.......................................................................................................................5 

1.2 Order options ..............................................................................................................5 

1.3 Used abbreviations......................................................................................................6 

1.4 Related documents.....................................................................................................6 

2 SECURITY..............................................................................................7 

2.1 General information.....................................................................................................7 

2.2 Restricted use.............................................................................................................7 

2.3 Children.......................................................................................................................7 

2.4 Operation/antenna.......................................................................................................7 

2.5 Electrostatic Discharge (ESD).....................................................................................8 

2.6 Moisture Sensitive Level (MSL)...................................................................................8 

3 SAFETY STANDARDS.................................................................................9 

4 TECHNICAL DATA...................................................................................10 

4.1 FEATURES...............................................................................................................10 

5 TECHNICAL DESCRIPTION........................................................................11 

5.1 Receiver Architecture................................................................................................11 

5.2 Product applications..................................................................................................11 

5.3 Technical specifications.............................................................................................12 

5.3.1 Electrical Characteristics.....................................................................................12 

5.4 Operational Modes....................................................................................................13 

5.5 Low Power Modes.....................................................................................................14 

5.5.1 NMEA input message for ATP Mode (Not available in ROM-Mode)....................15 

6 HARDWARE INTERFACE AND CONFIGURATION SIGNALS.....................................17 

6.1 JP18 - QFN-Pin Configuration...................................................................................17 

6.2 Configuration and timing signals................................................................................19 

7 SOFTWARE INTERFACE............................................................................21 

7.1 SiRF binary data message........................................................................................21 

7.2 NMEA data message.................................................................................................22 

7.2.1 NMEA output messages......................................................................................22 

7.2.2 NMEA input messages........................................................................................22 

7.2.3 Transport Message..............................................................................................23 

8 MECHANICAL DRAW AND LAYOUT AND SOLDERING.........................................24 

8.1 RF connection...........................................................................................................25 

8.2 Solder profile requirements.......................................................................................26 

This confidential document is the property of FALCOM and may not be copied or circulated without permission. 

Page 2


9 FIRST STEPS TO MAKE IT WORKS...............................................................27 

10 APPENDIX..........................................................................................29 

10.1 How to put the JP18 into power saving modes?......................................................29 

Version history: 

This table provides a summary of the document revisions. 

Version Author Changes Modified 

1.0.7 F. Beqiri 

- Added power consumption in Hibernate/Standby state - see Figure 3. 

- SiRF input messages 0x82 and 0x95 are not supported - see Table 7. 

- SPI bus is not supported in the current software. Depending on purchase order quantity it is 

possible to make a variant of the software that supports the SPI interface. For more information 

please contact our sales department. 

25/01/2010 


- Added key characteristics of power management modes, see chapter 5.5.2. 

- In the JP18 hardware revision "4d", the ON/OFF pin is pulled low through a 47 kΩ. 

11/02/2009 

1.0.5 F. Beqiri - VRTC_REG_IN must be always connected to the VCC pin. 06/06/2008 


- The firmware version ROM is very early (engineering proof) and was never intended for 

production use. 

23/05/2008 


- Power consumption in the Hibernate state is replaced to “To be defined” - see Fig. 3. 

- The ON/OFF pin works only in the FLASH mode. 

17/03/2008 

1.0.2 F. Beqiri - JP18 module can accept only one reflow process. 

- Replaced Fig.1 by a new one. 

25/09/2007 

- Added standards for handling ESD sensitive devices – see chapter 2.5. 

1.0.1 F. Beqiri - JP18 module is classified as a MSL3 device – see chapter 2.6. 

- Throughout this documentation the input voltage range of VRTC_REG_IN and VCC has 

changed from 3.4 .. 5.5 to 3.3 .. 5.5 V. 

- Added description of pin ON/OFF- See chapter 6.2, page 22 

12/09/2007 

1.0.0 F. Beqiri - Initial version 05/07/2007 


Page 3


Cautions 

Information furnished herein by FALCOM is believed to be accurate and reliable. 

However, no responsibility is assumed for its use. Also the information 

contained herein is subject to change without notice. 

Please, read carefully the safety precautions. 

If you have any technical questions regarding this document or the product described 

in it, please, contact your vendor. 

General information about FALCOM and its range of products is available at the 

following Internet address: http://www.falcom.de/ 

Trademarks 

Some mentioned products are registered trademarks of their respective 

companies. 

Copyright 

This description is copyrighted by FALCOM Wireless Communications GmbH 

with all rights reserved. No part of this user’s guide may be produced in any form 

without the prior written permission of FALCOM Wireless Communications 

GmbH. 

FALCOM Wireless Communications GmbH 

The manufacture assumes no liability for any errors or discrepancies that may 

have occurred in preparation of this document. 

Note 

Specifications and information given in this document are subject to change 

by FALCOM without notice. 


Page 4


1 INTRODUCTION 

1.1 General 

This description is focussed on the GPS receiver of the FALCOM JP18 from 

FALCOM. 

The JP18 architecture is based on the SiRFstarIII core (GSC3LTf chipset), the 

same industry-leading GPS DSP core design found all members of the GSC3 

family, but implemented in leading-edge 90 nm fabrication process 

technology, operating at 1.2V to provide superior performance and best-inclass 

power consumption. 

The new differentiating features that give the JP18 its unique identity are: the 

new lower power SiRFstarIII-LT core, integrated 4 Mbits program ROM with ROM 

patch memory, UART, and a new highly optimized 11 mm x 11 mm multi-chip 

module with a height of 1.7 mm. The LNA is enabled and disables automatically 

from the software to lower overall power consumption when the receiver is not 

in use. 

The single board solution offered in 22-pin (11 mm x 11 mm) QFN mounting 

device is optimized for location applications requiring high performance in a 

very small form factor - ideal for devices with limited on-board processing 

power. 

The JP18 concept builds perfect basis for the design of high-sensitive, lowpower, 

compact and cost efficient state-of-the-art GPS enabled system 

solutions for target platforms such as mobile phones, automotive systems, 

portable computing devices, and embedded consumer devices. The FALCOM 

JP18 is also designed to be entire products such as AVL tracking units, 

handheld GPS. 

1.2 Order options 

Figure 1: The top (left) and bottom (right) views of the FALCOM JP18 

Name Description 

JP18 Packaged in a 22-pin package QFN mounting 

Table 1: Ordering options 


Page 5


1.3 Used abbreviations 

Abbreviation Description 

DGPS Differential GPS 

DOP Dilution of Precision 

GPS Global Positioning System 

GGA GPS Fixed Data 

LNA Low Noise Amplifier 

NMEA National Maritime Electronics Association 

PRN Pseudo - Random Noise Number – The Identity of GPS satellites 

QFN Quad Flat No-lead 

RF Radio Frequency 

RP Receive Protocol 

RTC Real Time Clock 

RTCM Radio Technical Commission for Maritime Services 

SDI Data input 

SDO Data output 

SA Selective Availability 

WAAS Wide Area Augmentation System 

MSK Minimum Shift Keying 

PCB Printed Circuit Board 

PRN Pseudo-random noise 

IF Intermediate Frequency 

A/D Analog/Digital 

Table 2: Abbreviations 

1.4 Related documents 

[1.] SiRF binary and NMEA protocol specification; 

www.falcom.de│Support│Documentation│Sirf│SiRFmessages_SSIII.zip 

[2.] SiRF-demo software and manual; 

www.falcom.de│Support│Documentation│Sirf│SiRFdemo.pdf 

www.falcom.de│Support│Software & Tools│Sirf│Manual_SiRFdemoX.XX.zip 

[3.] AppNotes_JP18_gps_receiver.pdf 

[4.] GPSevaluationKitForJP13JP14JP15JP18FSA01_UserManualVer_1.03.pdf 


Page 6


2 SECURITY 

This chapter contains important information for the safe and reliable use of the 

GPS receiver. Please read this chapter carefully before starting to use the GPS 

receiver. 

2.1 General information 

The Global Positioning System uses satellite navigation, an entirely new concept 

in navigation. GPS has become established in many areas, for example, in civil 

aviation or deep-sea shipping. It is making deep inroads in vehicle 

manufacturing and before long everyone of us will use it this way or another. 

The GPS system is operated by the government of the United States of America, 

which also has sole responsibility for the accuracy and maintenance of the 

system. The system is constantly being improved and may entail modifications 

effecting the accuracy and performance of the GPS equipment. 

2.2 Restricted use 

Certain restrictions on the use of the GPS receiver may have to be observed on 

board a plane, in hospitals, public places or government institutions, 

laboratories etc. Follow these instructions. 

2.3 Children 

Do not allow children to play with the GPS receiver. It is not a toy and children 

could hurt themselves or others. The GPS receiver consists of many small parts 

which can come loose and could be swallowed by small children. Thoughtless 

handling can damage the GPS receiver. 

2.4 Operation/antenna 

Operate the GPS receiver with an antenna connected to it and with no 

obstruction between the receiver and the satellite. 

Make absolutely sure that the antenna socket or antenna cable is not shorted 

as this would render the GPS receiver non-functional. 

Do not use the receiver with a damaged antenna. Replace a damaged 

antenna without delay. Use only a manufacturer-approved antenna. Use only 

the supplied or an approved antenna with your GPS receiver. Antennas from 

other manufacturers which are not authorized by the supplier can damage the 

GPS receiver. 

Technical modifications and additions may contravene local radio-frequency 

emission regulations or invalidate the type approval. 

Authorized GPS antennas: FAL-ANT-3 (active antenna) 


Page 7


2.5 Electrostatic Discharge (ESD) 

The JP18 GPS receiver contains class 1 devices. The JP18 module contains 

components that can be damaged or destroyed by electrostatic discharge. 

When handling the module, observe the necessary safety precautions against 

electrostatic discharge (ESD), in accordance with EN 61340-5-1 and the 

following. The following Electrostatic Discharge (ESD) precautions are 

recommended: 

- Protective outer garments. 

- Handle device in ESD safeguarded work area. 

- Transport device in ESD shielded containers. 

- Monitor and test all ESD protection equipment. 

- Treat the JP18 GPS receiver as extremely sensitive to ESD. 

2.6 Moisture Sensitive Level (MSL) 

The JP18 GPS receiver is classified as a MSL3 device. JP18 is moisture sensitive 

and need to be handled within proper MSL3 guidelines to avoid damage from 

moisture absorption and exposure to solder reflow temperatures that can result 

in yield and reliability degradation. That means, after the module JP18 is 

removed from the vacuum packaging, it must go through reflow for main 

board assembly within 168 hours (1 week). If this conditions is not met, the 

module should be baked for 24 hours at 125ºC before board mounting. 

References 

Customers may refer to following IPC standards for more details: 

➢ J-STD-033B Standard for Handling, Packing, Shipping and Use of 

Moisture/Reflow Sensitive Surface Mount Devices. 

➢ J-STD-020D Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State 

Surface Mount Devices. 


Page 8


3 SAFETY STANDARDS 

The GPS receiver meets the safety standards for RF receivers and the standards 

and recommendations for the protection of public exposure to RF 

electromagnetic energy established by government bodies and professional 

organizations, such as directives of the European Community, Directorate 

General V in matters of radio frequency electromagnetic energy. 


Page 9


4 TECHNICAL DATA 

4.1 FEATURES 

� GPS: 

� Size: 

� Weight: 

� TCXO: 

� On-Chip Memory: 

� OEM single board 20 channel GPS receiver. 

� 11 x 11 x 1.7 mm (L x B x H) 

� 0.5 gr 

� Operating Voltage: 

� Power Consumption: 

� Power Management: 

� Temperature Range: 

� ROM Operation: 

� FLASH Operation: 

� BOOTMODE: 

� ± 0.5 ppm 

� FLASH 4 Mbit 

� ROM 4 Mbit 

� +3.3 V ... + 5.5 V DC 

� approx. 27 mA (continuous mode) 

� 25 µA (Hibernate state) 

� Adaptive TricklePower (ATP) - for more details see 

chapter 5.5.1, page 16. 

� -20 to +70 °C (operation, transportation and storage). 

� Baudrate: 4800 bps, 

� Messages: (1x1 sec.)RMC, GGA, GSA; (1x5sec.) GSV -(1 x 5 

sec.) 

� Baudrate: 38400 bps, 

� Messages: RMC, GGA, GSA, GSV - (1 x 1 sec.) 


Page 10


� To load a new firmware into the internal FLASH use 

SiRFflash tool version 3.2 or higher. 


Page 11


5 TECHNICAL DESCRIPTION 

5.1 Receiver Architecture 

The JP18 OEM GPS receiver from FALCOM is a new OEM GPS receiver product 

that features the SiRFstarIII single chipset. The core of JP18 units is comprised of 

the GSC3LPf that includes the Digital and RF in a single chip. The SiRFstarIII-LT 

DSP core processes the incoming baseband samples and outputs GPS satellite 

pseudo-range measurements for storage in on-board SRAM. Once in DSP 

SRAM, the pseudo-range measurements are then available for further 

processing by the ARM7TDMI-S to calculate position, speed, heading, and time. 

The firmware for ARM7TDMI-S is stored and executed directly from either the onboard 

4 Mbit ROM or 4 Mbit FLASH memory. The calculated position, speed, 

heading, and time data is stored in CPU SRAM, which is then formatted in the 

selected data format (NMEA, SiRF Standard Binary (SSB), or AI3/F) for transfer to 

the host via the UART. In Assisted-GPS applications, the use of Location Protocol 

Libraries (provided by SiRF) running on the host, the navigation data can be 

converted to other industry standard location protocols such as RRLP, RRC, 

NMEA and PDDM. 

Figure 2: Receiver architecture of the JP18 GPS receiver. 

Figure 2 above shows the block diagram of the JP18 architecture. 

5.2 Product applications 

- Handheld GPS receiver applications 

- Automotive applications 

- Marine navigation applications 

- Aviation applications 

- Timing applications 


Page 12


5.3 Technical specifications 

5.3.1 Electrical Characteristics 

� GPS features: 

� Horizontal position accuracy: 

� Datum: 

� Sensitivity: 

� O EM single board 20 channel GPS receiver, L1 1575.42 

MHz, C/A code 1,023 MHz chip rate. 

� GPS receiver with SiRFstarIII – GSC3LTf chip 

� Processor type ARM7/TDMI 

� A utonomous < 2.5 meters 

� SBAS


5.4 Operational Modes 

External configuration inputs permit booting from on-chip boot loader, and 

internal flash memory. The default strap configuration for on-chip operational 

program ROM is provided by on-chip pullups so that external pull-ups are not 

required, saving cost and reducing footprint. Table 1 summarizes the program 

memory bootstrap configurations. 

DATA 0 DATA 1 

ROM Open Open 

FLASH Open Connect to GND 

BOOTMODE Connect to VIO Open 

Table 1: ROM and Flash Operating Mode 

Two basic functional modes are of primary concern to the system designer: 

ROM and Flash. 

● ROM mode. This is the default program memory out of which the JP18 

receiver executes its GPS application firmware on reset. 

No external configuration inputs are required to select 

this mode. In this mode, the device is executing firmware 

directly from on-chip ROM. The on-chip cache-control 

hardware is used to provide a ROM patching facility. 

Important: The firmware version ROM is very early 

(engineering proof) and was never intended 

for production use. 

● FLASH mode. This is supported when the DATA 1 line is connected to 

GND (ground). On reset, the JP18 receiver executes 

firmware directly from the FLASH memory. In this mode, 

the device is executing firmware directly from external 

non-volatile memory, such as FLASH. This is the 

secondary operational mode intended for those 

customers who want the flexibility of implementing 

software updates. The cache-controller hardware is 

used to accelerate read accesses from Flash. 

Flash Loader Mode 

This is provided to support flash loading. This mode is supported when the 

DATA 0 is connected to VIO pin. On reset, the JP18 receiver is set into the 

Flash Loader Mode the flash loader program attempts to load the program 

to the internal flash via the on-board UART (RXA and TXA) before executing 

normal operations. 

GPS operational modes include: Acquisition, Tracking, and Clock Only. 

These modes are accessed and automatically managed through SiRF’s 

firmware products: 

Acquisition: 

RF is on; ARM processor is running; GPS DSP core is running highest 

duty cycle; RTC is running. This is the highest power consumption 

mode of the JP18 GPS receiver. 


Page 14


Tracking: 

RF is on; ARM processor is running; GPS DSP core is running lowest 

duty cycle; RTC is running. This is the second highest power 

consumption mode of the JP18 GPS receiver, and this is the mode 

in which the JP18 GPS receiver is expected to spend most of its 

operational time. 

Clock Only: 

Circuits are powered; clocks are gated to GPS DSP core; RF 

biases are removed from the receiver chain but the system clock 

is running; ARM processor is running; RTC is running. 

All three operational modes are available in both ROM and Flash 

functional modes. 

5.5 Low Power Modes 

In low power modes, the device is no longer acquiring and tracking satellites or 

providing navigation solutions. It is then desirable to lower power consumption 

by placing the device in either STANDBY or HIBERNATE state from the CLOCK 

ONLY state. These modes are accessed and automatically managed through 

SiRF firmware products: 

STANDBY: 

Circuits are powered; clocks are gated; RF biases are removed; RTC is 

running. This is the second lowest power consumption mode of the 

GSC3LT. 

HIBERNATE: 

External power is ON; RF and BB (baseband) core and IO voltages are OFF; 

RTC is running. This is the lowest power consumption mode of the GSC3LT. 

In hibernate state the receiver drives 25µA of current. 

All low power modes are available in Flash functional mode. 

Remark: The environment temperature may also affect the power consumption in the Standby state. 

Figure 3: Three system states into the ATP mode. 


Page 15


The transition from Standby state back to the full power is generated through 

the internal RTC, which transmits a wake up signal to the GPS engine to switch it 

on. The JP18 is woken up and begins to acquire the on view satellites and to 

collect their data. Under normal tracking conditions, the receiver is set for a 

specific update period (range from 1 to 10 seconds), and a specific sampling 

time during each period (range from 200 to 900 ms). The receiver turns to full 

power state for the sampling time to collect data, and then operates in 

Standby state for the remainder of the update period. The next full-power state 

is initiated by an RTC wakeup. But in harsh tracking environments the receiver 

automatically switches to full power state to improve navigation performance. 

When the satellites are sorted according to their signal strength, the fourth 

satellite determines if the transition will occur or not. The threshold is 26 dB-Hz. 

When tracking, conditions return to normal (four or more satellites with C/No of 

30 dB-Hz or higher), the receiver switches back to the power saving mode. 

5.5.1 NMEA input message for ATP Mode 

( Not available in ROM-Mode) 

Power saving mode is disabled by default. In order to enable it, input the NMEA 

message in table below. The description of each parameter used for Adaptive 

TricklePower or Push-To-Fix is listed below. Key characteristics of power 

management modes is given in chapter 5.5.2. How these messages can be 

sent to the GPS unit, refer to chapter Appendix section 10.1 page 32. 

Syntax $PSRF107,,,,,, 

Examples 

$PSRF107,1,400,2000,60000,60000,1*17 // ATP mode 

$PSRF107,2,400,60000,60000,60000,0*21 // PTF mode 

$PSRF107,0,0,0,0,0,0*21 // back to Continuous mode 

Parameter Description 

 

Defines the mode to be performed. It can be set to: 

0 Sets the target receiver back to the Continuous 

mode (full power). 

1 Sets the target receiver into the Adaptive 

TricklePower (ATP) mode. 

2 Sets the target receiver into the Push-To-Fix (PTF) 

mode. 

 

Defines the OnTime period in milliseconds the receiver will stay in full 

power state until a position solution is made and estimated to be 

reliable. Please note that, in harsh tracking environments the 

receiver automatically switches to full power state to improve 

navigation performance even if the defined OnTime has been 

expired. When the satellites are sorted according their signal 

strength, the fourth satellite determines if the transition to Standby 

mode/hibernate state will occur or not. It can be set to a value 

between: 

200 ... 900 OnTime period in milliseconds 


Page 16


 

Defines the complete interval of time in milliseconds the receiver will 

stay in full power and Standby mode/hibernate state. 

It can be set to a value between: 

1000 ... 10000 Interval of time in milliseconds intended for 

Adaptive TricklePower (ATP) mode. 

10000 ... 7200000 Interval of time in milliseconds intended for 

Push-To-Fix (PTF) mode. 

 

Specifies the Maximum Acquire Time in milliseconds how long the 

GPS receiver should attempt to acquire satellites and navigate. If 

this time elapses and no GPS-fix is obtained, the GPS receiver puts 

itself into the sleep mode for up to MaxOffTime in ms. It means, the 

GPS receiver searches for MaxAcqTime in ms, sleeps for MaxOffTime in 

ms, searches again for MaxAcqTime in ms, etc. It can be set to a 

value between: 

1000 ... No Limit 

 

Specifies the Maximum Off Time in milliseconds how long the target 

receiver should remain off (sleep mode) before making another 

attempt to navigate. This mode is enabled, if the target receiver is 

turned on and acquires satellites, but does not navigate. This mode 

is disabled, if the target receiver is turned on, acquires and 

navigates. It can be set to a value between: 

1000 .. 1800000 

 

Enables/disables the ATP mode if the value of the 

parameter is set to 1, otherwise it does not have any effect. It can 

be set to: 

 

0 Disables ATP mode. 

1 Enables ATP mode. 

CHECKSUM is a two-hex character as defined in the NMEA 

specification. Use of checksums is required on all input messages. 

For more detailed information, refer to the chapter 7.2.3 page 26. 

 

* Note: 

Each message is terminated using Carriage Return (CR) Line Feed 

(LF) which is hex 0D 0A. Because 0D 0A are not printable ASCII 

characters, they are omitted from the example strings, but must be 

sent to terminate the message and cause the receiver to process 

that input message. 

• SiRF recommends the use of 300 ms, 1-second or 400 ms, 2-second for 

optimum performance. 


Page 17


5.5.2 Key characteristics of power management modes 

Key characteristics of power management modes are as follows: 

✔ Adaptive TricklePower (ATP) is a variant of TricklePower (TP). Only ATP is 

supported on JP18 receiver. TP is intended to save power by cycling 

between full power, a reduced power setting using just the CPU, and a 

low-power setting in a fixed-rate cycle. Cycle times range between 1 and 

10 seconds (how to configure this mode, see chapter 5.5.1). TP provides 

deterministic power savings with constant output rate, but may suffer lost 

fixes in a weak-signal environment. ATP operates similar to TP. However, 

when signal levels drop, ATP returns to full power so that message output 

rates remain constant and valid fixes are attempted even in difficult 

environments. This results in variable power savings but much more reliable 

performance for a fixed output rate. Applications using ATP should give 

performance very similar to full power, but with significant power savings in 

strong-signal conditions. When Adaptive TricklePower (ATP) is enabled the 

receiver will maximize the navigation performance while running 

TricklePower. Under normal tracking conditions, ATP performs the same as 

TricklePower, but in harsh tracking environments the receiver automatically 

switches to full power state to improve navigation performance. When the 

satellites are sorted according to their signal strength, the fourth satellite 

determines if the transition will occur or not. Currently, the threshold is 26 

dB-Hz. When tracking conditions return to normal (four or more satellites 

with C/N0 of 30 dB-Hz or higher), the receiver switches back to 

TricklePower. Consequently, navigation results can be improved in harsh 

GPS environments at the cost of using more power. 

✔ Push-to-Fix (PTF) mode is designed for the application that requires 

infrequent position reporting. The receiver generally stays in a low-power 

mode, up to 2 hours, but wakes up periodically to refresh position, time, 

ephemeris data and RTC calibration. A position request acts as a wakeup 

to the receiver, which is then able to supply a position within the hot-start 

time specification. The PTF period is 30 minutes by default but can be 

programmed between 10 seconds and 2 hours (how to configure this 

mode, see chapter 5.5.1). When the PTF mode is enabled, upon power on 

or a new PTF cycle, the receiver will stay on full power until a good 

navigation solution is computed. The hibernate state will follow for the 

remainder of the period. If it takes 36 seconds to fix position and refresh 

ephemeris on the default period of 30 minutes, the receiver will sleep for 

the 29 minutes and 24 seconds. When the application needs a position 

report, it can pulse the ON_OFF pin to wake up the receiver. Please note 

that it should be done only when the receiver is in hibernate state. When 

the receiver wakes up because of the ON_OFF pin, a new PTF cycle begins 

resetting all variables related to handling the wakeup and sleep time. 

Whenever the receiver wakes up, it stays on in order to collect pertinent 

GPS data, such as ephemeris and almanac before going back to sleep. 

Its purpose is to gather relevant data so that hot start condition can be 

prepared when it wakes up the next time. 

To wake the JP18 receiver (turn ON) from either a stand-by or hibernate state, 

only use the ON_OFF pin. A rising pulse for at least 63 µsecs. duration to this pin 


Page 18


will put the receiver into hibernate state if it is on and wake up if it is in sleep 

state. This pin functionality is unreliable while in ATP mode due to potential race 

conditions between internal control and external timing and should not be 

used. Asserting this signal when the receiver is already awake can cause the 

receiver to behave improperly, or to hang up entirely. The GPIO8 pin can be 

monitored since when its level is low, the JP18 receiver is either in a stand-by or 

hibernate state. 


Page 19


6 HARDWARE INTERFACE AND CONFIGURATION 

SIGNALS 

6.1 JP18 - QFN-Pin Configuration 

Note the orientation of pins on the JP18 receiver. When viewing the back side 

on the JP18 receiver, you will see a cut pad on the lower-right-corner. Given 

this viewing orientation (see fig. 7), Pad 22 is on the right-bottom and Pad 1 is on 

the bottom-right. 

Figure 4: JP18 pin identification 

PAD Name I/O Description Level 

1 GPIO 0 I/O User defined GPIO 1.8 V 

2 VRTC_REG_IN I Power for RTC and SRAM. It must be always connected to 

the VCC pin. 

3 ON/OFF I In the hardware revision "4d", this pin is internally pulled low 

through a 47 kΩ resistor. If not used leave it open. For 

detailed information about this pin, see description in chapter 

6.2, page 22. 

3.3 V – 5.5 V 

4 VRF O Output RF-regulator 2.7 V; Imax = 10 mA 

5 VANT I Power-supply for the active GPS antenna. Vin = 2.7V - 5V; Imax =20 mA 

6 GND - Ground 0 V 

7 RF_IN I RF-Input, L1, 1575,42 MHz 50 Ohms @ 1575,42 MHz 

8 GND - Ground 0 V 

1.2 V 

9 WAKEUP O Regulator Power Down Output. Active low 1.2 V 

10 TM O Time Mark Output (1 PPS) 1.8 V 

11 RXA I RS232 line (receive data) 1.8 V 

12 TXA O RS232 line (transmit data) 1.8 V 

13 RES I System Reset Input. Connect to GND for RESET. 1.2 V 

14 SPI_DI I SPI-Data-IN 

15 SPI_DO O SPI-Data-OUT 

Not supported in the current 

1.8 V 

16 SPI_CS O SPI-Chip-Select 

software. 

1.8 V 

1.8 V 

17 SPI_CLK I SPI-Clock 1.8 V 

18 DATA 0 I Input at startup. See Table 1: 1.8 V 


Page 20


PAD Name I/O Description Level 

19 DATA 1 I Input at startup. SeeTable 1: 1.8 V 

20 VCC I Main input power supply. To eliminate unwanted ripple on 

the supply voltage, it is recommended that the power supply 

be filtered by a 10uF/10V capacitor to ground. 

21 VIO O Output voltage for IO-Block 1.8 V 

22 GPIO 8 I User defined GPIO 1.8 V 

Table 3: JP18 - Ball description 

3.3 V – 5.5 V 


Page 21


6.2 Configuration and timing signals 

Pin Name Description 

RES Provides an active-low (GND) reset input to the board. It 

causes the board to reset and to restart searching for satellites. 

If not used, leave it open. 

TM Provides 1 pulse per second output from the board, which is 

synchronized to within 1 microsecond of GPS time. The output 

is a 1.8 V level signal. 

RXA Receiving channel. It is used to receive software commands to 

the board from SiRFdemo software or from user written 

software. 

TXA Transmitting channel. It is used to output navigation and 

measurement data to SiRFdemo or user written software. 

VCC Main DC power supply in range from 3.3 V – 5.5 V DC used to 

power the JP18 receiver. 

RF_IN Used to be connected directly an active antenna. The 

integrated low-noise amplifier of the active antenna can be 

supplied with the voltage provided by the VANT pin. 

Caution: Never connect or disconnect the antenna while the 

JP18 is in use. 

Caution: Never supply any voltage on the RF_IN pin. This pin is 

always fed from the VANT pin. 

VANT Input line reserved for supplying power to an active antenna 

connected to the unit. The antenna bias for a connected 

active antenna can be provided in two way: 

✔ Using a 5 V active GPS antenna, connect the VANT pin 

to a 5 V power source. 

✔ Or connect the VRF output pin to VANT pin to apply 

2.7V to the antenna line. The VRF pin outputs 2.7V 

when the receiver is on and not sleeping. 

Hint: The input voltage on the VANT should be chosen in 

according to the antenna to be used. 

Note: The GPS receiver JP18 has to be connected to an active 

GPS antenna with a max. current 20mA (10mA, if using VRF). 

VRF Provides +2.7V DC, and it can be connected to the VANT, to 

supply power to an active GPS antenna (max. 10 mA) 

connected to the GPS receiver. 

ON/OFF ON/OFF input to the internal Finite State Machine is at 1.2 V 

level and offers ON and OFF functions described below. 

Note that, the ON/OFF functions work only in FLASH mode, and 

not in ROM mode. 

The RTC clock must be on and stable for this control to be 

functional. Minimum on pulse duration is two RTC ticks, about 


Page 22


63 μs. Minimum inter-pulse interval is one second. Minimum off 

duration is two RTC ticks, about 63 μs. The functions described 

assume that power to various sections (RF, IO, LNA) is 

controlled through the power management control pin 

WAKEUP. 

Mode Receiver state Pulse to ON/OFF New state result of pulse to ON/OFF 

Main supplies are OFF OFF 

Do not attempt. Possible part 

damage due if excessive 

current is forced into the pin. 

Stays off 

Hibernate: RF, IO, BB off, VRTC on Hibernate OK Awakening 

Full Power GSW/SLC ON and running OK Transitions to Hibernate 

Full Power GSW/SLC Hibernate Awakens to Full-power 

Adaptive Trickle Power GSW Duty cycle ON 

Adaptive Trickle Power GSW Duty cycle OFF 

Push-To-Fix GSW ON and running 

Do not attempt because of 

possible race conditions. 





Push-to-Fix GSW Hibernate 

Must verify by monitoring 

voltages that receiver is in 

Hibernate. 

ON 

Advanced Power Management SLC Hibernate OK ON 

Advanced Power Management SLC ON* OK* Hibernate 

Indeterminate due to timing of pulse 

with respect to internal asynchronous 

mode changes 

Indeterminate due to timing of pulse 

with respect to internal asynchronous 

mode changes 

Indeterminate - if receiver is on, it will 

be turned off, if turning off, it will be 

turned back on 

* With SLC firmware, when in HIBERNATE, the controlling code must verify 

that APM is enabled, and verify that all sessions are closed. The 

controlling code must also allow for a 1 second delay after session is 

closed, before any attempt to externally awaken the receiver. 

This pin is internally pulled low through a 47 kΩ resistor on the JP18 

hardware and not on FSA02. Therefore, on FSA02 this pin should be 

pulled low thought a a ~47 kΩ resistor. 

Since it is a direct link to the core, this pin is limited to 1.2V. This is not a 

fail safe pin. The 1.2V VRTC power and clock should always be on and 

stable before this signal is asserted. 

The minimum inter-pulse interval is recommended as one second to 

allow time for the receiver to change modes in response to the 

preceding pulse. This requires that any activation of ON/OFF by 

mechanical switches must use suitable de-bouncing techniques to 

achieve minimum pulse duration and minimum inter-pulse interval. 


Page 23


7 SOFTWARE INTERFACE 

The FALCOM JP18 supports NMEA-0183 and SiRF binary protocols. A short 

description of these protocols is provided herein. 

For more detailed information about the messages listed in tables below, please 

refer to the SiRFstarIII message set specification available in the section 

“Support/Downloads/Documentation/SiRF/SiRFmessages_SSIII.zip” at FALCOM 

homepage. 

7.1 SiRF binary data message 

Table 6 lists the messages for the SiRF output 

Hex ASCII Name Description 

0 x 02 2 Measured Navigation Data Position, velocity and time 

0 x 03 3 True Tracker Data Not implemented 

0 x 04 4 Measured Tracking Data Satellite and C/No information 

0 x 06 6 SW Version Receiver software 

0 x 07 7 Clock Status Current clock status 

0 x 08 8 50 BPS Subframe Data Standard ICD format 

0 x 09 9 Throughput Navigation complete data 

0 x 0A 10 Error ID Error coding for message failure 

0 x 0B 11 Command Acknowledgement Successful request 

0 x 0C 12 Command No Acknowledgement Unsuccessful request 

0 x 0D 13 Visible List Auto Output 

0 x 0E 14 Almanac Data Response to Poll 

0 x 0F 15 Ephemeris Data Response to Poll 

0 x 10 16 Test Mode 1 For use with SiRFtest (Test Mode 1) 

0 x 12 18 Ok To Send CPU ON/OFF (Trickle Power) 

0 x 13 19 Navigation Parameters Response to Poll 

0 x 14 20 Test Mode 2 Additional test data (Test Mode 2) 

0 x 1C 28 Nav. Lib. Measurement Data Measurement Data 

0 x 1E 30 Nav. Lib. SV State Data Satellite State Data 

0 x 1F 31 Nav. Lib. Initialization Data Initialization Data 

0 x FF 255 Development Data Various status messages 

Table 6: SiRF Output Messages 

Table 7 lists the message list for the SiRF input messages. 


0 x 55 85 Transmit Serial Message User definable message 

0 x 80 128 Initialize Data Source Receiver initialization and associated parameters 

0 x 81 129 Switch to NMEA Protocol Enable NMEA message, output rate and baud rate 

0 x 82 130 Set Almanac (upload) Sends an existing almanac file to the receiver (not supported) 

0 x 84 132 Software Version (Poll) Polls for the loaded software version 

0 x 86 134 Set Main Serial Port Baud rate, data bits, stop bits and parity 

0 x 87 135 Switch Protocol Obsolete 

0 x 88 136 Mode Control Navigation mode configuration 

0 x 89 137 DOP Mask Control DOP mask selection and parameters 

0 x 8B 139 Elevation Mask Elevation tracking and navigation masks 

0 x 8C 140 Power Mask Power tracking and navigation masks 

0 x 8D 141 Editing Residual Not implemented 

0 x 8E 142 Steady-State Detection – not used Not implemented 

0 x 8F 143 Static Navigation Configuration for static operation 

0 x 90 144 Poll Clock Status (Poll) Polls the clock status 

0 x 92 146 Poll Almanac Polls for almanac data 

0 x 93 147 Poll Ephemeris Polls for ephemeris data 

0 x 94 148 Flash Update On the fly software update 


Page 24



0 x 95 149 Set Ephemeris (upload) Sends an existing ephemeris to the receiver (not supported) 

0 x 96 150 Switch Operating Mode Test mode selection, SV ID and period 

0 x 97 151 Set Trickle Power Parameters Push to fix mode, duty cycle and on time 

0 x 98 152 Poll Navigation Parameters Polls for the current navigation parameters 

0 x A5 165 Set UART Configuration Protocol selection, baud rate, data bits, stop bits and parity 

0 x A6 166 Set Message Rate SiRF binary message output rate 

0 x A7 167 Low Power Acquisition Parameters Low power configuration parameters 

0 x B6 182 Set UART Configuration Obsolete 

Table 7: SiRF Input Messages 

7.2 NMEA data message 

7.2.1 NMEA output messages 

Table 8 lists all NMEA output messages supported by SiRFstarIII evaluation 

receiver and a brief description. 

Option Description 

GGA Time, position and fix type data. 

GLL Latitude, longitude, UTC time of position fix and status. 

GSA GPS receiver operating mode, satellites used in the position solution and DOP values. 

GSV The number of GPS satellites in view satellite ID numbers, elevation, azimuth and SNR values. 

RMC Time, date, position, course and speed data. 

Table 8: NMEA Output Messages 

7.2.2 NMEA input messages 

Message MID 1 

Description 

Set Serial Port 100 Set PORT A parameters and protocol 

Navigation Initialization 101 Parameters required for start using X/Y/Z2 Query/Rate Control 103 Query standard NMEA message and/or set output rate 

LLA Navigation Initialization 104 Parameters required for start using Lat/Lon/Alt3 Development Data On/Off 105 Development Data messages On/Off 

MSK Receiver Interface MSK Command message to a MSK radio-beacon receiver. 

Table 9: MEA Input Messages 

1.Message Identification (MID). 

2.Input co-ordinates must be WGS84. 

3.Input co-ordinates must be WGS84. 

Note: NMEA input messages 100 to 105 are SiRF proprietary. The MSK 

NMEA string is as defined by the NMEA 0183 standard. 


Page 25


7.2.3 Transport Message 

Start Sequence Payload Checksum End Sequence 

$PSRF 1 Data 2 *CKSUM 3 4 

1. Message Identifier consisting of three numeric characters. Input 

messages begin at MID 100. 

2. Message specific data. Refer to a specific message section for 

... definition. 

3. CHECKSUM is a two-hex character checksum as defined in the NMEA 

specification. Use of checksums is required on all input messages. 

4. Each message is terminated using Carriage Return (CR) Line Feed (LF) 

which is \r\n which is hex 0D 0A. Because \r\n are not printable ASCII 

characters, they are omitted from the example strings, but must be 

sent to terminate the message and cause the receiver to process that 

input message. 

CheckSum 

The checksum is 15-bit checksum of the bytes in the payload data. The 

following pseudo code defines the algorithm used. 

Let message to be the array of bytes to be sent by the transport. 

Let msgLen be the number of bytes in the message array to be 

transmitted. 

Clearly to say, the string over which the checksum has to be calculated is 

between the “$” and “*” (without characters “$” and “*”). 

Index = first 

checkSum = 0 

while index < msgLen 

checkSum = checkSum + message[index] 

checkSum = checkSum AND (2 15 -1). 

Note: All fields in all proprietary NMEA messages are required, none are 

optional. All NMEA messages are comma delimited. 


Page 26


8 MECHANICAL DRAW AND LAYOUT AND 

SOLDERING 

The following chapters describe the mechanical dimensions of JP18 and give 

recommendations for integrating of the JP18 into your application platform. 

Note that, the absolute maximum dimension for JP18 module is: 11.0 mm x 11.0 

mm (L x B) with a dimension tolerance of ±0.1 mm. 

Figure below shows the bottom view on JP18 and provides an overview of the 

mechanical dimensions of the pointed pins. 

Figure 5: The mechanical draw of the JP18 receiver 


Page 27


8.1 RF connection 

The JP18 GPS receiver is designed to be functional by using either a passive 

patch antenna or an antenna connector with standard RF cables. 

Figure 6: RF connection to antenna feed of the JP18 GPS receiver (bottom view) 

Recommendations for layout, and soldering. Please note that, the dimension 

tolerance is ±0.1 mm. 

Figure 7: Recommendations for layout (JP18). 


Page 28


8.2 Solder profile requirements 

Figure 8 shows the recommended solder profile for Pb-free JP18 unit. 

Figure 8: Typical solder conditions (temperature profile, reflow conditions). 

Consider for a long time in the soldering zone (with temperature higher than 

217 °C) has to be kept as short as possible to prevent component and substrate 

damages. Peak temperature must not exceed 250 °C. 

Please note that this soldering profile is a reference to the soldering 

machine FALCOM utilizes. This profile can vary by using different paste 

types, and soldering machines, and it should be adapted to the customer 

application. NO liability is assumed for any damage to the module caused 

while soldering. 

Reflow profiles in tabular form 

Profile Feature Values 

Ramp-Up Rate < 3 K/second 

Preheat- zone 

– Temperature Range 

– Time 

Peak-zone: 

– Peak Temperature 

– Time above 217°C 

160-180°C 

100-120 seconds 

240°C .. 250°C max. 

65-75 seconds 

Ramp-Down Rate < 3 K/second 

Note: JP18 module can accept only one reflow process. 


Page 29


9 PUTTING THE RECEIVER INTO OPERATION - FIRST 

STEPS 

For basic operation, only the four connections are necessary. These are: 

✔ A GPS antenna 

✔ Power supply for active antenna 

✔ A bi-directional voltage translation for 1.8V and 3.3 V 

✔ Power supply and RTC 

Figure 9: FXL translator circuit 

To provide a suitable operating environment and to prevent damage avoid: 

✔ Frequent exposure to water 

✔ Extreme temperatures (+70° C) 

✔ High vibration environments 

Antenna 

The antenna connection is the most critical part of PCB routing. Before placing 

the JP18 on the PCB, make sure that the connection to the antenna signals is 

routed. In order to make it properly functional, a control impedance line has to 

connect the RF_IN signal with antenna feed points or antenna connector, 

respectively. The routing on the PCB depends on your choice. 

Power 

The input power is also very important as far as the minimum and maximum 

voltage is concerned. The power supply of JP18 has to be a single voltage source 

of VCC at 3.3V to 5.5 VDC. Connect the GND pins to ground, and the VCC pin to 

a 3.3V..5.5 VDC power source. To eliminate unwanted ripple on the supply 

voltage, it is recommended that the power supply be filtered by a 

10uF/10V capacitor to ground (as shown in figure above). The capacitor 

should be placed as close as possible to the module’s power supply pin. If 

they are correctly connected, the board is full powered and the unit begins 

obtaining its position fix. 


Page 30


Serial Interface 

The UART (RXA and TXA) is used as a host interface and debug interface 

between the host and JP18 receiver. This interface is provided with two wires 

the RXA and TXA lines. These pins are 1.8 V. So you need a voltage translator for 

RX and TX lines to convert their voltage level from 1.8V to VCC (see Fig. 9 

above). 

The quickest way to get first results with the JP18 is to use the JP18 Evaluation 

board together with the program SiRFdemo. 

Figure 10: Evaluation board with connected JP18 GPS receiver (without antenna connected). 

The Evaluation board contains: 

- Evaluation Box, 

- JP18 sample with soldered antenna connector, 

- an additional not soldered JP18 receiver, 

- power supply (AC/DC adapter, Type FW738/05, Output 5VDC 1.3 A), 

- active GPS antenna (FAL-ANT-3), 

- RS232 cable to your computer, 

- Evaluation board user’s manual. 

The Evaluation board with contained components are not included in the 

delivery package. The Evaluation board will have to be purchased separately. 

The SiRFdemo manual and software are available on FALCOM’s Website for 

free download: 

� www.falcom.de│Support│Documentation│Sirf│SiRFdemo.pdf 

� www.falcom.de│Support│Documentation│Sirf│SiRFdemo.zip 


Page 31


10 APPENDIX 

10.1 How to put the JP18 into power saving modes? 

By means of SiRFdemo software version 3.81 from SiRF the user is able to 

configure this operation mode with desired setting. 

The input message is accepted if the GPS receiver operates in the NMEA 

mode, else the input message will be ignored. The commands above cannot 

be implemented if the target receiver operates in the SiRF Binary mode. 

In order to set the receiver into the ATP mode via input messages, start the 

SiRFdemo software version 3.81, select the COM port where GPS receiver is 

connected and the baud rate to 38400 bps (for FLASH mode) or 4800 bps (for 

ROM mode), then open the COM port (for detailed information refer to the 

“GPSevaluationKitForJP13JP14JP15_UserManualVer_1.xx.pdf” document). 

If the receiver is operating in SiRF binary mode, switch it to the NMEA mode, 

select Switch to NMEA protocol from the Action menu of main window. After 

the receiver has obtained a GPS fix, it is able to be set in the ATP mode. To do 

this, open Action menu from main window and start Transmit Serial Message 

…. On the appeared dialog box select NMEA… protocol from the Protocol 

Wrapper option and type the following command onto the memo field as 

in Fig. 11: 

PSRF107,1,400,2000,60000,60000,1 (Sets the target receiver into the ATP 

mode. Excluding $-sign and checksum) 

After the message is correctly typed, send the defined message to the target unit by 

clicking the SEND button. The target device responds with Acknowledged … if the sent 

message is accepted by the target unit. 

Figure 11: Transmit a NMEA message to the target unit. 

To set the target receiver back to the full power mode just transmit the 

following message: 

PSRF107,0,0,0,0,0,0 // Sets the target receiver back to full power mode 

For more information, how to send the SiRF Binary or NMEA messages to the target unit, 

please refer to the SiRFstarIII message set specification available in the section 

“Support/Documentation/SiRF/SiRFmessages_SSIII.zip” at FALCOM homepage. 


Page 32

FALCOM JP18 GPS receiver - Hardware manual

Create successful ePaper yourself

Delete template?

Save as template?