FALCOM JP18 GPS receiver - Hardware manual

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JP18 FALCOM GPS RECEIVER VERSION 1.0.7 6.2 Configuration and timing signals Pin Name Description RES Provides an active-low (GND) reset input to the board. It causes the board to reset and to restart searching for satellites. If not used, leave it open. TM Provides 1 pulse per second output from the board, which is synchronized to within 1 microsecond of GPS time. The output is a 1.8 V level signal. RXA Receiving channel. It is used to receive software commands to the board from SiRFdemo software or from user written software. TXA Transmitting channel. It is used to output navigation and measurement data to SiRFdemo or user written software. VCC Main DC power supply in range from 3.3 V – 5.5 V DC used to power the JP18 receiver. RF_IN Used to be connected directly an active antenna. The integrated low-noise amplifier of the active antenna can be supplied with the voltage provided by the VANT pin. Caution: Never connect or disconnect the antenna while the JP18 is in use. Caution: Never supply any voltage on the RF_IN pin. This pin is always fed from the VANT pin. VANT Input line reserved for supplying power to an active antenna connected to the unit. The antenna bias for a connected active antenna can be provided in two way: ✔ Using a 5 V active GPS antenna, connect the VANT pin to a 5 V power source. ✔ Or connect the VRF output pin to VANT pin to apply 2.7V to the antenna line. The VRF pin outputs 2.7V when the receiver is on and not sleeping. Hint: The input voltage on the VANT should be chosen in according to the antenna to be used. Note: The GPS receiver JP18 has to be connected to an active GPS antenna with a max. current 20mA (10mA, if using VRF). VRF Provides +2.7V DC, and it can be connected to the VANT, to supply power to an active GPS antenna (max. 10 mA) connected to the GPS receiver. ON/OFF ON/OFF input to the internal Finite State Machine is at 1.2 V level and offers ON and OFF functions described below. Note that, the ON/OFF functions work only in FLASH mode, and not in ROM mode. The RTC clock must be on and stable for this control to be functional. Minimum on pulse duration is two RTC ticks, about This confidential document is the property of FALCOM and may not be copied or circulated without permission. Page 22
JP18 FALCOM GPS RECEIVER VERSION 1.0.7 63 μs. Minimum inter-pulse interval is one second. Minimum off duration is two RTC ticks, about 63 μs. The functions described assume that power to various sections (RF, IO, LNA) is controlled through the power management control pin WAKEUP. Mode Receiver state Pulse to ON/OFF New state result of pulse to ON/OFF Main supplies are OFF OFF Do not attempt. Possible part damage due if excessive current is forced into the pin. Stays off Hibernate: RF, IO, BB off, VRTC on Hibernate OK Awakening Full Power GSW/SLC ON and running OK Transitions to Hibernate Full Power GSW/SLC Hibernate Awakens to Full-power Adaptive Trickle Power GSW Duty cycle ON Adaptive Trickle Power GSW Duty cycle OFF Push-To-Fix GSW ON and running Do not attempt because of possible race conditions. Do not attempt because of possible race conditions. Do not attempt because of possible race conditions. Push-to-Fix GSW Hibernate Must verify by monitoring voltages that receiver is in Hibernate. ON Advanced Power Management SLC Hibernate OK ON Advanced Power Management SLC ON* OK* Hibernate Indeterminate due to timing of pulse with respect to internal asynchronous mode changes Indeterminate due to timing of pulse with respect to internal asynchronous mode changes Indeterminate - if receiver is on, it will be turned off, if turning off, it will be turned back on * With SLC firmware, when in HIBERNATE, the controlling code must verify that APM is enabled, and verify that all sessions are closed. The controlling code must also allow for a 1 second delay after session is closed, before any attempt to externally awaken the receiver. This pin is internally pulled low through a 47 kΩ resistor on the JP18 hardware and not on FSA02. Therefore, on FSA02 this pin should be pulled low thought a a ~47 kΩ resistor. Since it is a direct link to the core, this pin is limited to 1.2V. This is not a fail safe pin. The 1.2V VRTC power and clock should always be on and stable before this signal is asserted. The minimum inter-pulse interval is recommended as one second to allow time for the receiver to change modes in response to the preceding pulse. This requires that any activation of ON/OFF by mechanical switches must use suitable de-bouncing techniques to achieve minimum pulse duration and minimum inter-pulse interval. This confidential document is the property of FALCOM and may not be copied or circulated without permission. Page 23
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