FALCOM JP18 GPS receiver - Hardware manual

JP18 FALCOM GPS RECEIVER VERSION 1.0.7
Tracking:
RF is on; ARM processor is running; GPS DSP core is running lowest
duty cycle; RTC is running. This is the second highest power
consumption mode of the JP18 GPS receiver, and this is the mode
in which the JP18 GPS receiver is expected to spend most of its
operational time.
Clock Only:
Circuits are powered; clocks are gated to GPS DSP core; RF
biases are removed from the receiver chain but the system clock
is running; ARM processor is running; RTC is running.
All three operational modes are available in both ROM and Flash
functional modes.
5.5 Low Power Modes
In low power modes, the device is no longer acquiring and tracking satellites or
providing navigation solutions. It is then desirable to lower power consumption
by placing the device in either STANDBY or HIBERNATE state from the CLOCK
ONLY state. These modes are accessed and automatically managed through
SiRF firmware products:
STANDBY:
Circuits are powered; clocks are gated; RF biases are removed; RTC is
running. This is the second lowest power consumption mode of the
GSC3LT.
HIBERNATE:
External power is ON; RF and BB (baseband) core and IO voltages are OFF;
RTC is running. This is the lowest power consumption mode of the GSC3LT.
In hibernate state the receiver drives 25µA of current.
All low power modes are available in Flash functional mode.
Remark: The environment temperature may also affect the power consumption in the Standby state.
Figure 3: Three system states into the ATP mode.
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