FALCOM JP18 GPS receiver - Hardware manual
FALCOM JP18 GPS receiver - Hardware manual
FALCOM JP18 GPS receiver - Hardware manual
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
<strong>JP18</strong> <strong>FALCOM</strong> <strong>GPS</strong> RECEIVER VERSION 1.0.7<br />
63 μs. Minimum inter-pulse interval is one second. Minimum off<br />
duration is two RTC ticks, about 63 μs. The functions described<br />
assume that power to various sections (RF, IO, LNA) is<br />
controlled through the power management control pin<br />
WAKEUP.<br />
Mode Receiver state Pulse to ON/OFF New state result of pulse to ON/OFF<br />
Main supplies are OFF OFF<br />
Do not attempt. Possible part<br />
damage due if excessive<br />
current is forced into the pin.<br />
Stays off<br />
Hibernate: RF, IO, BB off, VRTC on Hibernate OK Awakening<br />
Full Power GSW/SLC ON and running OK Transitions to Hibernate<br />
Full Power GSW/SLC Hibernate Awakens to Full-power<br />
Adaptive Trickle Power GSW Duty cycle ON<br />
Adaptive Trickle Power GSW Duty cycle OFF<br />
Push-To-Fix GSW ON and running<br />
Do not attempt because of<br />
possible race conditions.<br />
Do not attempt because of<br />
possible race conditions.<br />
Do not attempt because of<br />
possible race conditions.<br />
Push-to-Fix GSW Hibernate<br />
Must verify by monitoring<br />
voltages that <strong>receiver</strong> is in<br />
Hibernate.<br />
ON<br />
Advanced Power Management SLC Hibernate OK ON<br />
Advanced Power Management SLC ON* OK* Hibernate<br />
Indeterminate due to timing of pulse<br />
with respect to internal asynchronous<br />
mode changes<br />
Indeterminate due to timing of pulse<br />
with respect to internal asynchronous<br />
mode changes<br />
Indeterminate - if <strong>receiver</strong> is on, it will<br />
be turned off, if turning off, it will be<br />
turned back on<br />
* With SLC firmware, when in HIBERNATE, the controlling code must verify<br />
that APM is enabled, and verify that all sessions are closed. The<br />
controlling code must also allow for a 1 second delay after session is<br />
closed, before any attempt to externally awaken the <strong>receiver</strong>.<br />
This pin is internally pulled low through a 47 kΩ resistor on the <strong>JP18</strong><br />
hardware and not on FSA02. Therefore, on FSA02 this pin should be<br />
pulled low thought a a ~47 kΩ resistor.<br />
Since it is a direct link to the core, this pin is limited to 1.2V. This is not a<br />
fail safe pin. The 1.2V VRTC power and clock should always be on and<br />
stable before this signal is asserted.<br />
The minimum inter-pulse interval is recommended as one second to<br />
allow time for the <strong>receiver</strong> to change modes in response to the<br />
preceding pulse. This requires that any activation of ON/OFF by<br />
mechanical switches must use suitable de-bouncing techniques to<br />
achieve minimum pulse duration and minimum inter-pulse interval.<br />
This confidential document is the property of <strong>FALCOM</strong> and may not be copied or circulated without permission.<br />
Page 23