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CCS C Compiler Manual PCB / PCM / PCH

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Functional Overview<br />

can_enable_rtr(PROG_BUFFER b);<br />

can_disable_rtr(PROG_BUFFER b);<br />

can_load_rtr<br />

(PROG_BUFFER b, int * data, int len);<br />

can_enable_filter(long filter);<br />

can_disable_filter(long filter);<br />

Enables the automatic response feature which<br />

automatically sends a user created packet when a<br />

specified ID is received. ECAN<br />

Disables the automatic response feature. ECAN<br />

Creates and loads the packet that will automatically<br />

transmitted when the triggering ID is received.<br />

ECAN<br />

Enables one of the extra filters included in the<br />

ECAN module. ECAN<br />

Disables one of the extra filters included in the<br />

ECAN module. ECAN<br />

can_associate_filter_to_buffer<br />

(CAN_FILTER_ASSOCIATION_BUFFERS Used to associate a filter to a specific buffer. This<br />

buffer,CAN_FILTER_ASSOCIATION allows only specific buffers to be filtered and is<br />

filter);<br />

available in the ECAN module. ECAN<br />

can_associate_filter_to_mask<br />

(CAN_MASK_FILTER_ASSOCIATE<br />

mask,<br />

CAN_FILTER_ASSOCIATION filter);<br />

can_fifo_getd(int32 & id,int * data,<br />

int &len,struct rx_stat & stat);<br />

Used to associate a mask to a specific buffer. This<br />

allows only specific buffer to have this mask applied.<br />

This feature is available in the ECAN module. ECAN<br />

Retrieves the next buffer in the fifo buffer. Only<br />

available in the ECON module while operating in fifo<br />

mode. ECAN<br />

Relevant Preprocessor:<br />

None<br />

Relevant Interrupts:<br />

#int_canirx<br />

#int_canwake<br />

#int_canerr<br />

#int_cantx0<br />

#int_cantx1<br />

#int_cantx2<br />

This interrupt is triggered when an invalid packet is<br />

received on the CAN.<br />

This interrupt is triggered when the PIC is woken up<br />

by activity on the CAN.<br />

This interrupt is triggered when there is an error in<br />

the CAN module.<br />

This interrupt is triggered when transmission from<br />

buffer 0 has completed.<br />

This interrupt is triggered when transmission from<br />

buffer 1 has completed.<br />

This interrupt is triggered when transmission from<br />

buffer 2 has completed.<br />

45

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