Stability Analysis of an All-Electric Ship MVDC Power Distribution ...

Stability Analysis of an All-Electric Ship
MVDC Power Distribution System
Using a Novel Passivity-Based Stability Criterion
Antonino Riccobono, Enrico Santi
Dept. of Electrical Engineering
University of South Carolina
Columbia, SC 29208, USA
riccobon@cec.sc.edu, santi@cec.sc.edu
Abstract—The present paper describes a recently proposed
Passivity-Based Stability Criterion (PBSC) and demonstrates its
usefulness and applicability to the stability analysis of the
MVDC Power Distribution System for the All-Electric Ship. The
criterion is based on imposing passivity of the overall DC bus
impedance. If passivity of the bus impedance is ensured, stability
is guaranteed as well. The PBSC, in contrast with existing
stability criteria, such as the Middlebrook criterion and its
extensions, which are based on the minor loop gain concept, i.e.
an impedance ratio at a given interface, offers several
advantages: reduction of artificial design conservativeness,
insensitivity to component grouping, applicability to multiconverter
systems and to systems in which the power flow
direction changes, for example as a result of system
reconfiguration. Moreover, the criterion can be used in
conjunction with an active method to improve system stability,
called the Positive Feed-Forward (PFF) control, for the design of
virtual damping networks. By designing the virtual impedance
so that the bus impedance passivity condition is met, the
approach results in greatly improved stability and damping of
transients on the DC bus voltage. Simulation validation is
performed using a switching-model DC power distribution
system.
I. INTRODUCTION
Recently, there has been an increased interest in using
MVDC Power Distribution for the US Navy All-Electric Ship
[1-3] and a new IEEE Standard has been released [4]. The
single-bus MVDC power distribution system depicted in Fig.
1 is an example of a possible MVDC system topology
described in the Standard. As a well-known challenge, MVDC
distribution systems suffer from stability degradation caused
by interactions among converters due to the presence of
constant power loads (CPLs), such as feedback-controlled
converters and inverters. The CPLs exhibit negative
incremental input impedance, which is the origin of potential
instability [5-8].
To address system-level stability issues several authors
have studied the system by breaking it down into two
subsystems: a source subsystem and a load subsystem at an
arbitrary interface within the overall system. It is usually
assumed that the two subsystems have been properly designed
to be individually stable with good dynamic performance. A
fixed power flow direction is also assumed. To assess overall
system stability, several stability criteria for DC systems based
on the minor loop gain, i.e. the ratio of source and load
subsystem impedances, have been proposed in the literature,
such as the Middlebrook Criterion [9], and its various
extensions, such as the Gain and Phase Margin Criterion [10],
the Opposing Argument Criterion [11-13], the ESAC Criterion
[14, 15] and its extension, the Root Exponential Stability
Criterion [16]. All these criteria have been reviewed by the
authors in [17], which presents a discussion, for each criterion,
of the artificial conservativeness of the criterion in the design
of DC systems, and the design specifications that ensure
system stability. Shortcomings of all these criteria (also
discussed in [17]) are that they lead to artificially conservative
designs, encounter difficulties when applied to multi-converter
systems (more than two interconnected subsystems) especially
in the case when power flow direction changes, and are
sensitive to component grouping. Moreover, all these criteria,
with the exception of the Middlebrook Criterion, are not
This work was supported by the Office of Naval Research under grant
N00014-08-1-0080.
Figure 1: Proposed MVDC power distribution system for US
Navy all-electric ship (simplified).
978-1-4673-5245-1/13/$31.00 ©2013 IEEE 411

conducive to an easy design formulation. Another significant
practical difficulty present with all the prior stability criteria is
the minor loop gain online measurement [18]. It requires two
separate measurements, source subsystem output impedance
and load subsystem input impedance, and then some postprocessing.
Due to the complexity in the calculation, this
approach is not suitable for online stability monitoring. (Only
in the work [19], a practical approach to measure the stability
margins of the minor loop gain was proposed. However, such
an approach, based on the Opposing Argument Criterion, fails
when used with other less conservative criteria.)
To tackle all these difficulties, a novel Passivity-Based
Stability Criterion (PBSC) has been recently proposed [20].
The method is based on the passivity of the overall DC bus
impedance rather than on the Nyquist Criterion applied to an
impedance ratio. If the bus impedance is passive, the stability
of the system is guaranteed. In the present paper, the
usefulness and applicability of the PBSC to the stability
analysis of the MVDC Power Distribution System for the All-
Electric Ship is demonstrated using a meaningful, somewhat
simpler test system. Moreover, the PBSC can be coupled with
a recently proposed control strategy for switching converters
called Positive Feed-Forward (PFF) control [21, 22], to design
virtual damping impedances able to “passivate” and, therefore,
stabilize the DC bus.
The digital network analyzer technique [23] is the tool
adopted in the present paper to perform nonparametric
measurement of the bus impedance. From this measurement,
online bus impedance passivity condition and therefore system
stability can be monitored. This technique uses a switching
converter to perturb the bus, which has a pseudo-random
binary sequence (PRBS) signal in addition to the duty cycle
signal coming from its feedback controller. Since the PRBS is
an approximation of white noise, all frequencies of interest
can be excited simultaneously. The perturbation at the bus
interface is measured and the cross-correlation technique is
applied to construct the bus impedance of the system. Online
measurement of the bus impedance can be used for system
health monitoring, fault detection and localization, stability
and performance monitoring, stability improvement using
adaptive control, and for distributed control.
II. THE PASSIVITY-BASED STABILITY CRITERION
To better understand the main difference between the
PBSC and all previous criteria, one can examine Fig. 2. The
single-bus DC power distribution system in Fig. 2a consists of
n source converters and m load converters connected to the
bus, a generalization of the MVDC power distribution system
for All-Electric Ships depicted in Fig. 1. By looking at the bus
port, the given system can be reduced to an equivalent
interacting source subsystem and load subsystem network
(Fig. 2b) and then to an equivalent 1-port network (Fig. 2c).
While all previous criteria have stopped at the step shown in
Fig. 2b, the proposed PBSC combines together the two
subsystems. The resulting 1-port network shown in Fig. 2c
seen from the DC bus port has an impedance
Z bus (s)=V bus (s)/I inj (s), where I inj (s) is an injection current from
an external bus-connected device used to perturb the bus. This
impedance is clearly the parallel combination of all the
Figure 2: (a) Typical MVDC power distribution system for Ships
with n+m converters, (b) equivalent interacting source subsystem and
load subsystem network, and (c) equivalent 1-port network.
converters’ input/output impedances, i.e.
Z bus =Z S //Z in =Z 1 //...//Z n //Z n+1 //…//Z n+m . The resulting network is
passive if and only if:
1) Z bus (s) has no right half plane (RHP) poles, and
2) Re{Z bus (jω)}≥0, ∀ ω .
Condition 1) requires that the Nyquist contour of Z bus (jω)
cannot enclose any poles. Condition 2) is equivalent to
-90°≤arg[Z bus (jω)]≤90°, and corresponds to an impedance
having positive real part at all frequencies. This also implies
that the Nyquist contour of Z bus (jω) must lie wholly on the
RHP.
A passive network has the property of being stable [24].
Therefore, the proposed Passivity-Based Stability Criterion
(PBSC) for switching converter DC distribution systems (Fig.
2a) states that:
If the passivity condition (and therefore the phase constraint)
is satisfied for Z bus (s), then the overall system consisting of the
parallel combination of all the converters’ input/output
impedances (or equivalently of the two interacting
subsystems) is stable.
The PBSC has several advantages over the minor-loopgain-based
stability criteria:
• It can easily handle multiple interconnected converters
and inversion of power flow direction because what
matters is only the parallel combination of all input/output
impedances. Notice that for this reason, the PBSC is also
insensitive to component grouping – typically a problem
for the more conservative prior criteria.
• It reduces artificial design conservativeness typical of all
prior stability criteria because the LHP of the Nyquist plot
of Z bus (jω) is the “forbidden region”. One does not need to
consider encirclements of the (-1,0) point.
• Unlike the minor loop gain online measurement, the bus
impedance online measurement is easy to implement,
does not require complex post-processing, and is suitable
for system stability monitoring.
• The criterion lends itself to the design of virtual damping
impedances which can be actively introduced in parallel
at the bus load-side by a recently proposed control
strategy for switching converters called Positive Feed-
412

Forward (PFF) control. The PFF controller is designed
based on imposing passivity of the overall DC bus
impedance to provide a control design method that
ensures system stability and performance.
T
T
I
Gi
L c _ PICM
= 1 +
where T I =G cI·G iLd_OL .
I
(10)
III. THE CONCEPT OF POSITIVE FEED-FORWARD CONTROL
To understand the concept of PFF control, a complete
small-signal model of a PFF-and-FB-controlled switching
converter using g-parameter representation [25] is given. The
converter has an inner PI current loop and two outer loops
represented by a PI voltage control and a PFF control as
shown in Fig. 3. First, the open-loop PI current mode (PICM)
model is given, and then the closed-loop, both feed-forward
and feedback (FFFB), is derived. After the model is given, the
role of PFF control in the passivation, and therefore
stabilization, of a MVDC bus system is described.
The small-signal model of the open-loop converter under
duty cycle control (OL subscript) based on g-parameter
representation can be found in [26-28] for the case of DC-DC
converters and in [21, 22] for the case of a three-phase DC-AC
converter.
A. Open-loop model
The small-signal open-loop (G cFB (s)=0 and G cFF (s)=0)
PICM converter model is the following
⎡
⎡iˆ
⎤
in ⎢
⎢ ⎥ Z
vˆ
= ⎢
⎢ ⎥ ⎢G
⎢⎣
iˆ
⎥
L ⎦ ⎢
⎣Gi
in
vg
Lg
1
⎤
Gii
_ PICM
Gic
_ PICM ⎥⎡
vˆ
g ⎤
_ PICM
⎥⎢
⎥
−
⎥⎢
iˆ
(1)
load
_ PICM
Zout
_ PICM
Gvc
_ PICM ⎥
⎥⎢⎣
iˆ
⎥
c ⎦
_ PICM
Gi
i PICM
G
L _
iLc
_ PICM ⎦
The transfer functions for (1) are given in (2)-(10)
Z
G
G
G
Z
G
G
G
1
in _ PICM
ii _ PICM
ic _ PICM
vg _ PICM
out _ PICM
vc _ PICM
1
=
Z
= G
G
=
G
= G
in _ OL
ii _ OL
G
−
id _ OL
G
G
Gid
_ OLG
−
G
G
−
iL
g _ OL
iL
d _ OL
iLd
_ OL
iLi
_ OL
G
TI
1+
T
TI
1+
T
id _ OL id _ OL iL
g _ OL I
i d OL
G
L _
iL
d _ OL
1+
vg _ OL
1
=
Z
G
=
G
in _ OL
iL
g
iL g _ PICM
+
G
−
G
+
vd _ OL I
iL d _ OL
1+
G
_
= 1 T
G
_
= 1 T
iLi
iL i _ PICM
+
I
OL
I
OL
vd _ OL
G
vd _ OL
T
T
G
I
G
iL
d _ OL
iL
g _ OL
G
iL
d _ OL
iLi
_ OL
I
I
T
T
TI
1+
T
I
TI
1+
T
I
I
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
B. Closed-loop model
The closed-loop FFFB converter model (11) is obtained
from the open-loop PICM converter model (1) by imposing a
control current iˆ
= iˆ
−iˆ
= G ⋅ vˆ
− G ⋅ vˆ
vˆgs
c
vˆg
î load
G cI
î
c
î FF
G CFF
+
î in
dˆ
vˆg
+
‐
FF
î FB
FB
⎡ 1
⎤
⎡iˆ
⎤ ⎢
G
in
ii _ FFFB ⎥⎡
vˆ
⎤
⎢ ⎥ = Z
g
⎢ in _ FFFB
⎥⎢
⎥
(11)
⎣ vˆ
⎦ ⎢
⎥⎣
iˆ
load ⎦
⎣
Gvg
_ FFFB − Zout
_ FFFB ⎦
î FF
î
c
dˆ
(a)
î FB
î
L
vˆo
î load
1
î
+ in
Z
_
( s)
+
in OL +
G
_
( s)
+ vˆ
vg OL -
+
+
G iL g _ OL
( s)
î L
+
+
G ii _ OL
( s)
Z out _ OL
( s)
G iL i _ OL
( s)
G id _ OL
( s)
G vd _ OL
( s)
G iL
( s)
G cFB
d _ OL
Converter
T I
‐ PICM Converter
(b)
Figure 3: Switching converter with inner PI current loop, outer voltage
loop, and PFF control: (a) circuital representation, and (b) small-signal
block diagram representation.
cFF
g
cFB
T FB
413

î in
ˆ =0 i load
100
Bode plot of Z
Z bus_FB
Z S
Z S
vˆg
vg _ FB g
Z
in _ FB
G
ii _ FB
iˆ
G
load
vˆ
Z
out
_
FB
vˆo
Magnitude (dB)
50
0
-50
-100
90
Wres
Range of frequencies where
Passivity is violated
Z in_FB
(a)
ˆ =0 i load
Phase (deg)
0
-90
-180
Z S
vˆg
î in
Z
in _ FB
Z damp
G
ii
_
FB
G
G
iˆ
vd_
PICM
id_
PICM
load
G
vˆ
Z
vg_
g
damp
FB
vˆ
g
Z
out _ FB
vˆo
-270
-360
10 -1 10 0 10 1 10 2 10 3 10 4 10 5 10 6
250
Frequency (Hz)
(a)
Nyquist plot of Z
Z bus _ FB
200
Z S
Passivity Condition Violated
150
(b)
Figure 4: Source impedance Z S connected to the equivalent input port
of the switching converter: (a) unstable, (b) stable cases.
The transfer functions of model (11) are given in (12)-(15).
Notice that for the case of a three-phase DC-AC converter, the
model is developed in the dq synchronous reference frame and
therefore the elements G ii_FFFB , G vg_FFFB , and Z out_FFFB of the
matrix in (1) are 2x2 sub-matrices [21, 22].
Z
G
G
Z
1
in _ FFFB
⎪⎧
1
= ⎨
⎪⎩ Zin
_
⎪⎧
1
= ⎨
⎪⎩ Zin
_
PICM
FB
1
1+
T
FB
⎪⎫
⎪⎧
1
⎬ + ⎨
⎪⎭ ⎪⎩ Z
G
damp
+
Z
⎪⎫
⎬
⎪⎭
1
N _ vc _ OL
Z
TFB
1+
T
FB
⎪⎫
⎧ TFF
⎬ + ⎨
⎪⎭ ⎩1+
T
FB
⎫
⎬
⎭
(12)
ic _ PICM out _ PICM FB
ii _ FFFB
= Gii
_ PICM
+
⋅ = G (13)
vg _ FB
Gvc
_ PICM
1+
TFB
vg _ FFFB
⎧Gvg
_
= ⎨
⎩ 1+
T
=
{ G }
vg _ FB
Z
PICM
FB
⎫
⎬ +
⎭
G
+
G
G
G
vc _ PICM
ic _ PICM
⎧ TFF
⋅ ⎨
⎩1+
T
⎪⎧
1 ⎪⎫
⋅ ⎨ ⎬
⎪⎩ Zdamp
⎪⎭
vc _ PICM
ic _ PICM
FB
⎫
⎬
⎭
T
(14)
out _ PICM
out _ FFFB
= = Z
(15)
out _ FB
1+
TFB
where
Z
1
1
G
ic _ PICM vg _ PICM
= −
(16)
N _ vc _ PICM
Zin
_ PICM
Gvc
_ PICM
T FB =G cFB·G vc_PICM and T FF =G cFF·G ic_PICM are the FB and FF
loop gains, respectively. Notice that T FF has dimensions of
admittance [21, 22, 26-28]. Also, the special cases of FB
control only and PFF control only can be found from the more
G
Imaginary Axis
100
50
0
-50
-100
-150
-200
-250
-200 -100 0 100 200 300 400 500
Real Axis
(b)
Figure 5: Bode plot (a) and Nyquist plot (b) of the impedances Z bus_FB.
The blue arrows represent the desired passivation of the bus
impedance.
general FFFB model (11) and (12)-(15) by imposing G cFF =0
(T FF =0) and G cFB =0 (T FB =0), respectively.
C. Effect of PFF Control and Control Tradeoff
The expression for the input impedance (12) shows that
the PFF control provides a way to control the converter input
impedance through the last term on the right hand side of (12).
In particular, the PFF control has the effect of introducing
damping impedance Z damp in parallel to the already existing
Z in_FB with the goal of stabilizing the system. Given a desired
stabilizing impedance Z damp , designed so that the bus
impedance satisfies the PBSC, the transfer function of the PFF
controller is easily found from the last term on the right hand
side of (12) and from the expression of the FF loop gain:
G
cFF
T
=
G
FF
ic _ PICM
=
G
1 + TFB
(17)
ic _ PICM
⋅ Z
damp
Even though a switching converter is independently
designed to be stable, its dynamics in a large DC distribution
system, such as an All-Electric Ship MVDC Power
Distribution System, can be affected by the subsystem it is
connected to. Therefore, two types of interactions can be
414

identified: the source subsystem interaction, and the load
subsystem interaction. In this paper, the focus is on the source
subsystem interaction problem, i.e., a degradation of the
closed-loop stability of a switching converter when it is fed by
a DC voltage source subsystem with finite Thévenin
impedance Z S . Fig. 4a shows the two-port network terminal
model [29, 30], directly drawn from model (11), for the case
of FB only (G cFF (s)=0) with a non-ideal source impedance Z S .
In terms of passivity concept, passivity condition for
Z bus_FB is usually violated around ω res , i.e. the frequency where
Z bus_FB exhibits resonance, as Fig. 5 shows. Impedance Z bus_FB
follows the output impedance of the source subsystem Z S
everywhere except around the range of frequencies where it
exhibits resonance (in the parallel combination the smaller
impedance dominates). To solve the passivity condition
violation, i.e. to bring Z bus to the RHP so that it exhibits
positive real part at frequencies around ω res , the PFF control is
added to the conventional FB control according Fig. 3a. If
Z damp is designed so that (18) is satisfied, the passivity
violation can be solved.
Z
1
bus _ FFFB
1
=
Z
S
⎧ 1
⎪
⎪ Z
S
⎪ 1
≈ ⎨
⎪Z
⎪ 1
⎪
⎩ Z
S
1
+
Z
damp
in _ FB
1
+
Z
at low frequencies
at high
damp
atω
= ω
res
frequencies
(18)
Z bus_FFFB is the bus impedance resulting from the addition of
the PFF control. In other words, (18) shows that if Z damp is
designed so that it dominates at ω res (note, again, that in the
parallel combination the smallest impedance dominates), it
can provide the desired passivation effect (see blue arrows in
Fig. 5a), i.e. -90°≤arg[Z bus_FFFB (jω res )]≤90° while leaving the
bus impedance unchanged everywhere else. This is also
equivalent to moving the Nyquist plot of the bus impedance
from the LHP to the RHP, as the blue arrow in Fig. 5b
indicates.
Fig. 4 shows an equivalent model for the system under FB
control only (a) and under FFFB control (b). The feed-forward
action introduces two additional elements, impedance Z damp on
the source side and a controlled voltage source on the output
side. The impedance Z damp stabilizes the bus, but at a cost: the
output side voltage source has a negative effect on audio
susceptibility. This represents a tradeoff between stability
improvement and output performance degradation. In fact, as
Fig. 5 also depicts, on the one hand the addition of Z damp small
in magnitude at ω res (so that it dominates to solve the passivity
violation problem) is desired for stability improvement
purposes, on the other hand it negatively affects the audiosusceptibility
transfer function (14). For this reason, Z damp
should be carefully chosen. Notice that Z damp can be chosen to
be either passive or active impedance. What it important is
that it should be chosen so that ||Z damp (jω res )|| be not too small,
but small enough to dominate the bus impedance at ω res . A
PGM‐M PGM‐M PGM‐M PGM‐M
PCM‐A
PDM‐B
PCM‐B
PCM‐B
PCM‐B
PMM
PDM‐A
In‐Zone Distribution
PMM
PCM‐B
PCM‐B
PCM‐B
PCM‐A
Figure 6: Traditional 3-PDM IPS Architecture, with the two zones
that will be simulated.
good rule of the thumb is to choose Z damp so that
||Z bus_FB (jω res )|| dB is 20-25 dB larger than ||Z damp (jω res )|| dB . Of
course, condition (18) must be respected as well. In particular,
it is desired that arg[Z bus_FFFB (jω res )] lies as close as possible to
0° so that the system has a good passivity margin (it is far
away from the passivity boundary).
IV. SIMULATION RESULTS
In this section, the PBSC is validated by using a switching
model of a MVDC bus system built in Simulink. The
simulated system is a power down-scaled portion of one of the
possible Integrated Power System (IPS) architectures that
have been proposed in [31]. The architecture taken into
consideration in this paper is the traditional three Propulsion
Distribution Module (PDM) ISP architecture, shown in Fig 6.
PDM-A is a HVDC bus (10 KV), PGMs are high frequency
Power Generation Modules with rectifier units, PMMs are
Propulsion Motor Modules, PDM-B is a MVDC bus (1000 V),
and the Power Conversion Modules (PCMs) are switching
converters. Two portions of the system in Fig. 6 will be
simulated, represented by areas within the red and blue dashed
lines. Fig. 7 shows the system switching model built in
Simulink. The area within the red dashed line is a cascade of a
PICM-FB-controlled buck converter and a PICM-FFFBcontrolled
three-phase voltage source inverter (VSI). The
controller of the VSI has a PFF controller in addition to the
conventional FB controller as shown in Fig. 8. The area within
the blue dashed line is the same system with the addition of a
high bandwidth CPL, representative of another switching
converter or a pulsed load, like a radar or rail-gun for future
naval combatants. Specifications for both buck converter and
VSI are also reported in Fig. 7. The PFF control was designed
to actively introduce the following damping impedance at the
VSI input port.
1
Zdamp
= Rb
+ sLb
+
(19)
sCb
where R b =21.34Ω, L b =17.88mH, and C b =157.19µF. The PFF
controller transfer function is then calculated from (17).
PDM‐B
415

Figure 7: Cascade of a PICM-FB controlled buck converter and a PICM-FFFB-controlled VSI. Another buck converter is used to perturb the bus and
extract bus impedance. A high bandwidth CPL added to the bus has the effect of destabilizing the bus.
Viewed from the bus port, the entire system can be lumped
into a 1-port network, as previously described in Section II.
The digital network analyzer technique [23] is the tool used to
measure the bus impedance and address system level stability
issues in a MVDC power distribution system. This technique
uses a switching converter as a perturbation source, and its
controller as a signal analyzer to measure small-signal transfer
functions and impedances of interest. Referring to Fig. 9, a
pseudo-random binary sequence (PRBS) test signal is added to
the duty cycle signal from the feedback controller. Applying
the cross-correlation technique to the appropriate measured
quantities allows online monitoring of the bus impedance
Z bus (s)=V bus (s)/I inj (s).
A. Cascade of Buck Converter and VSI
For this case, the system with only FB control is
marginally stable, while the same system with FFFB control is
highly stabilized. Fig. 10 shows the Bode plot of the bus
impedance, which is the parallel combination of the output
Figure 8: Control of the VSI. PICM-FB loop in the middle and FF loop at the top.
Figure 9: Conceptual block diagram showing injection of a test
signal for system bus impedance measurements.
impedance of the buck converter and the input impedance of
the VSI (Eq. (20). The analytical transfer functions, given in
(20), are compared with the nonparametric results given by the
digital network analyzer in simulation.
Z
⎛ 1 1 ⎞
_
= ⎜
+ ⎟
(20)
bus CL
⎝ Zout
_ CL(
Buck )
Zin
_ CL(
VSI ) ⎠
where CL denotes either FB or FFFB.
−1
416

240
230
220
210
200
190
180
170
160
150
Magnitude [dB]
Phase [deg]
60
40
20
0
-20
100
50
-50
-100
Magnitude of Z bus
10 1 10 2 10 3 10 4
0
Phase of Z bus
10 1 10 2 10 3 10 4
Frequency [Hz]
Estimation with FFFB
Analytical TF with FFFB
Analytical TF with FB only
Estimation with FB only
Figure 10: Z bus estimation through PRBS injection and comparison with
analytical transfer functions for the cascade of buck converter and VSI.
R = 10 ohm -> 20 ohm
Vbus
R = 20 ohm -> 10 ohm
Vabc
FB only
FFFB
arg[Z bus_FB (jω res )]≈±90°. Notice that for both cases the bus
impedance satisfies the passivity condition, i.e.
-90°≤arg[Z bus (jω)]≤90°, ∀ ω . Fig. 11 depicts the transient
responses of the bus voltage and three-phase output voltage in
correspondence of (a) balanced three-phase load step and (b)
voltage reference step, starting from a steady-state condition.
Notice the presence of sustained oscillations for the FB case
only, and the stabilization of the bus voltage for the FFFB
case. Moreover, the three-phase output voltage is somehow
more distorted during the transient for the FFFB case. This is
due to the fact that the PFF control alters the audiosusceptibility
of the VSI, as discussed in Section III. However,
Fig. 11 shows that a good trade-off between stability
improvement and FB control bandwidth reduction has been
achieved.
B. Addition of a High Bandwidth CPL
The addition of a high bandwidth CPL (P CPL =300W)
further deteriorates the passivity condition and the stability of
the system. The system with only FB control is now unstable,
while the same system with FFFB control is again highly
stabilized. Fig. 12 shows the Bode plot of the bus impedance.
The analytical transfer function for the bus impedance, given
in (21), now includes the CPL load input impedance in
parallel. The analytical results are compared with the
nonparametric results given by the digital network analyzer
simulation.
100
50
0
-50
-100
-150
300
280
260
240
220
200
180
160
140
120
150
100
50
0
-50
R = 10 ohm -> 20 ohm
R = 20 ohm -> 10 ohm
0.1 0.15 0.2 0.25
(a)
Vbus
Vref = 90 Vpk -> 45 Vpk
Vref = 45 Vpk -> 90 Vpk
Vabc
FB only
FFFB
Z ⎛ 1 1 1 ⎞
_
= ⎜
+ + ⎟
(21)
bus CL
⎝ Zout
_ CL(
Buck )
Zin
_ CL(
VSI )
Zin
_ CPL ⎠
where CL denotes either FB or FFFB, and Z in_CPL =-V 2 bus /P CPL .
As shown in Fig. 12, in the stable case the bus impedance
well satisfies the passivity condition because
arg[Z bus_FFFB (jω res )]≈0°, while in the unstable stable case the
passivity condition is not met because arg[Z bus_FB (jω)] goes
beyond ±90° for some frequencies near the resonant
frequency. Note that at low frequency the phase is -270°,
which is the same as +90°, and at high frequency the phase is
-90°; however around the resonant frequency the phase
exceeds the ±90° range. Fig. 13 depicts the transient responses
of the bus voltage, three-phase output voltage, in
correspondence of (a) symmetric three-phase load step, (b)
voltage reference step, and (c) CPL power step, starting from a
steady-state condition. Notice the instability for the FB case
only, and the stabilization of the bus voltage for the FFFB
case.
−1
-100
-150
Vref = 90 Vpk -> 45 Vpk
Vref = 45 Vpk -> 90 Vpk
0.1 0.15 0.2 0.25
(b)
Figure 11: Time-domain results for the cascade of buck converter and VSI.
Comparison of FB only and FFFB in correspondence to (a) balanced resistive
step applied to the VSI and (b) voltage reference step applied to the VSI.
As shown in Fig. 10, in the stable case the bus impedance
well satisfies the passivity condition at the resonant frequency,
because arg[Z bus_FFFB (jω res )]≈0°, while in the marginally
stable case the passivity condition is only weakly met, because
CONCLUSIONS
The PBSC has been proposed as a new stability criterion
based on the passivity of the bus impedance. If that impedance
is passive then the entire system is stable. Advantages of the
PBSC over prior stability criteria, based on the minor loop
gain concept, have been discussed. Combined with the PFF
control, it is possible to design stabilizing virtual damping
impedances so that the PBSC is satisfied. The usefulness of
the PBSC in system stability online monitoring and design so
that the entire system is stable and well-behaved has been
proved by the switching model simulation of a portion of the
417

three-PDM ISP architecture proposed for the MVDC Power
Distribution System for the All-Electric Ship. Frequency and
time domain results have validated the proposed method.
350
300
250
Vbus
Magnitude of Z bus
60
Estimation with FFFB
200
Analytical TF with FFFB
Magnitude [dB]
40
20
0
Analytical TF with FB only
Estimation with FB only
150
100
150
100
R = 10 ohm -> 20 ohm
R = 20 ohm -> 10 ohm
Vabc
FB only
FFFB
50
-20
10 1 10 2 10 3 10 4
0
Phase of Z bus
-50
100
-100
0
-150
R = 10 ohm -> 20 ohm
R = 20 ohm -> 10 ohm
0.1 0.15 0.2 0.25
Phase [deg]
-100
(a)
-200
350
Vbus
-300
10 1 10 2 10 3 10 4
Frequency [Hz]
Figure 12: Z bus estimation through PRBS injection and comparison with
analytical transfer functions for the cascade of buck converter and VSI and the
addition of a 300W CPL.
300
250
200
150
100
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