P1149.7 - Board Test Workshop Home Page

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Applications Debug Forces at Work “Hold test gains while achieving better pin utilization” Debug + <strong>Test</strong> >> “Make the right compromises” Custom protocols supported Instrument application Preserve scan performance Reduce pin count for test/debug Preserve <strong>Test</strong> IP, localize change Preserve SW IP, localize change Manage pin utilization in a structured way Scan and instrumentation packets Less pins/same performance More functions on test pins 1149.1 fundamentals preserved Selection layer only Allow use of existing test equipment Preserve SI IP, minimize change Protocol converter 1149.1 foundation GS - BTW - 09/014/2006
GS - BTW - 09/014/2006 So, what can it do?
Page 1 and 2: Squeezing the power out of a Debug
Page 3 and 4: Presentation Outline P1149.7 histor
Page 5 and 6: P1149.7 History and Status MIPI Or
Page 7 and 8: Engage Consortiums: P1149.7 Activit
Page 9: Key P1149.7 Objectives Do more with
Page 13 and 14: Scan BDX CDX Power Test A Look Insi
Page 15 and 16: CDX - Custom Use of Link BW “Supp
Page 17 and 18: P1149.7 - Adds capability to 1149.1
Page 19 and 20: P1149.7 Overview Extensions to the
Page 21 and 22: Harmony with the 1149.1 Standard TM
Page 23 and 24: Overloading the Bypass Instruction
Page 25 and 26: Creating a Control Level Example:
Page 27 and 28: Extending 1149.1 Pins Required=2 Co
Page 29 and 30: P1149.7 Deployment Method Capabilit
Page 31 and 32: IEEE P1149.7 Class Details Class T0
Page 33 and 34: Projected adoption profile Class 0:

P1149.7 - Board Test Workshop Home Page

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