Mobile Intel® 945 Express Chipset Family

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18 Datasheet
Introduction 1 Introduction This document contains specifications for the following chipsets: • The Mobile Intel® 945 Express Chipset family for the Intel Centrino Duo Technology. • The Intel 945GT Express Chipset is designed for use in desktop designs. • The Intel® 945GU Express Chipset is designed for use with the Intel Processor A100 and A110 in the Intel ultra mobile platform designs. • The Mobile Intel® 945GSE Express Chipset is designed for use with the Intel® Atom Processor N270 in the Netbook Platform 2008 designs. The Mobile Intel 945GM/945GME/GMS/GU/GSE, 943/940GML and Intel 945GT Express Chipsets come with the Generation 3.5 Intel Integrated Graphics Engine, and the Intel® Graphics Media Accelerator 950 (Intel® GMA 950), providing enhanced graphics support over the previous generation Graphics and Memory Controller Hubs ((G)MCH’s). The (G)MCH manages the flow of information between the four following primary interfaces: • FSB • System Memory Interface • Graphics Interface • DMI Datasheet 19
Page 1 and 2: Mobile Intel® 945 Express Chipset
Page 3 and 4: Contents 1 Introduction............
Page 5 and 6: 5.1.1 VID - Vendor Identification .
Page 7 and 8: 6.2.73 G5SC - Group 5 Strength Cont
Page 9 and 10: 7.1.1 VID1 - Vendor Identification
Page 11 and 12: 8.2.10 MMADR - Memory Mapped Range
Page 13 and 14: 11 Electrical Characteristics .....
Page 15 and 16: 23 System Memory Organization Suppo
Page 17: Revision History Revision Number De
Page 21 and 22: Introduction Figure 2. Intel Centri
Page 23 and 24: Introduction 1.1 Mobile Intel® 945
Page 25 and 26: Introduction 1.1.4.1 Analog CRT •
Page 27 and 28: Introduction 1.1.10 Mobile Intel®
Page 29 and 30: Introduction 1.5 Mobile Intel® 945
Page 31 and 32: Introduction 1.8.7 ICH Support 1.8.
Page 33 and 34: Introduction (Sheet 2 of 2) Term De
Page 35 and 36: Signal Description 2 Signal Descrip
Page 37 and 38: Signal Description Signal Name Type
Page 41 and 42: Signal Description 2.2.2 DDR2 SDRAM
Page 45 and 46: Signal Description 2.3.1 Serial DVO
Page 49 and 50: Signal Description 2.5.4 Serial DVO
Page 51 and 52: Signal Description LDDC_DATA SDVOCT
Page 53 and 54: Signal Description 2.8 Platform Pow
Page 55 and 56: Signal Description 2.10 Reset State
Page 57 and 58: Signal Description 2.10.3 DDR2 SDRA
Page 59 and 60: Signal Description 2.10.6 DDR SDRAM
Page 61 and 62: Signal Description 2.10.9 DMI Signa
Page 63 and 64: Signal Description 2.10.12 LVDS Sig
Page 65 and 66: Signal Description 2.10.15 Reset an
Page 67 and 68: (G)MCH Register Description 3 (G)MC
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(G)MCH Configuration Process and Re
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Host Bridge Device 0 - Configuratio
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Device 0 Memory Mapped I/O Register
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PCI Express Graphics Device 1 Confi
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Internal Graphics Device 2 Configur
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System Address Map 9 System Address
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System Address Map Figure 10. Syste
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System Address Map 9.1.2.1 Compatib
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System Address Map 9.2 Main Memory
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System Address Map In an internal g
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System Address Map 9.4 PCI Express
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System Address Map Figure 14. Graph
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System Address Map 9.7 SMM Space Re
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System Address Map address signal i
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Functional Description 10 Functiona
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Functional Description 10.2 System
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Functional Description 10.2.3.2 Dua
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Functional Description 10.2.4.2 Pin
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Functional Description Table 28. DR
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Functional Description 10.2.8.1 Sel
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Functional Description 10.3.1.2 Tra
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Functional Description Figure 17. S
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Functional Description Figure 19. S
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Functional Description 10.4 Integra
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Functional Description 10.4.1.3.2 P
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Functional Description 10.4.1.6.3 T
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Functional Description objects). Th
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Functional Description The (G)MCH h
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Functional Description 10.5.2 Plane
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Functional Description 10.5.4 Displ
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Functional Description clock freque
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Functional Description Figure 23. L
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Functional Description 10.5.4.4.2 S
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Functional Description 10.6.2.2 CPU
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Functional Description 10.6.4.2.3 C
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Functional Description 10.6.5.1 CPU
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Functional Description Figure 27. E
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Functional Description 10.7.1.1 Int
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Functional Description When process
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Electrical Characteristics 11 Elect
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Electrical Characteristics 11.2 Pow
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Electrical Characteristics Table 49
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Electrical Characteristics 11.4.3 T
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Strapping Configuration 12 Strappin
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Ballout and Package Information 13
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Mobile Intel® 945 Express Chipset Family

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