Mobile Intel® 945 Express Chipset Family

Host Bridge Device 0 - Configuration Registers (D0:F0)
5.1.15 DMIBAR - MCH-ICH Serial Interconnect Ingress Root
Complex
B/D/F/Type: 0/0/0/PCI
Address Offset: 4C-4Fh
Default Value: 00000000h
Access: R/W/L; RO
Size: 32 bits
This is the base address for the DMI Root Complex MMIO configuration space. This
window of addresses contains the DMI Root Complex register set for the PCI Express
Hierarchy associated with the MCH. There is no physical memory within this 4-KB
window that can be addressed. The 4 KB reserved by this register does not alias to any
conventional PCI 2.3-compliant memory mapped space.
On reset, this register is disabled and must be enabled by writing a 1 to bit[0] of this
register.
Bit Access
Default
Value
Description
31:12 R/W/L 00000h
DMI Root Complex MMIO Register Set Base Address:
This field corresponds to bits 31 to 12 of the base address DMI
RCRB MMIO configuration space.
BIOS will program this register resulting in a base address for a
4-KB block of contiguous memory address space. This register
ensures that a naturally aligned 4-KB space is allocated within
total addressable memory space of 4 GB.
System Software uses this base address to program the DMI
RCRB registers.
11:1 RO 000h Reserved
0 R/W/L 0b
DMIBAR Enable (DMIBAREN):
0: DMIBAR is disabled and does not claim any memory.
1: DMIBAR memory mapped accesses are claimed and
decoded appropriately.
92 Datasheet