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Résumé Lars Bauer - CES - KIT

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� W. Ahmed, M. Shafique, L. <strong>Bauer</strong>, M. Hammerich, J. Henkel, J. Becker, “Run-Time Resource Allocation for<br />

Simultaneous Multi-Tasking in Multi-Core Reconfigurable Processors”, IEEE 19th Symposium on Field-<br />

Programmable Custom Computing Machines (FCCM’11), Salt Lake City, Utah, USA, pp. 29-32, May 2011.<br />

Received a “European Network of Excellence on High Performance and Embedded Architecture and Compilation”<br />

HiPEAC Paper Award.<br />

� M. Shafique, L. <strong>Bauer</strong>, W. Ahmed, J. Henkel, “Minority-Game-based Resource Allocation for Run-Time Reconfigurable<br />

Multi-Core Processors”, IEEE/ACM 14th Design Automation and Test in Europe Conference<br />

(DATE’11), Grenoble, France, pp. 1261-1266, March 2011.<br />

� W. Ahmed, M. Shafique, L. <strong>Bauer</strong>, J. Henkel, “mRTS: Run-Time System for Reconfigurable Processors with<br />

Multi-Grained Instruction-Set Extensions”, IEEE/ACM 14th Design Automation and Test in Europe Conference<br />

(DATE’11), Grenoble, France, pp. 1554-1559, March 2011.<br />

� M. Shafique, L. <strong>Bauer</strong>, J. Henkel, “Selective Instruction Set Muting for Energy-Aware Adaptive Processors”,<br />

IEEE/ACM 28th International Conference on Computer-Aided Design (ICCAD’10), San Jose, CA, USA, pp.<br />

353-360, November 2010.<br />

Nominated as IEEE/ACM William J. McCalla ICCAD’10 Best Paper Candidate.<br />

� R. Koenig, L. <strong>Bauer</strong>, T. Stripf, M. Shafique, W. Ahmed, J. Becker, J. Henkel, “KAHRISMA: A Novel<br />

Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array Architecture”, IEEE/ACM 13th Design<br />

Automation and Test in Europe Conference (DATE’10), Dresden, Germany, pp. 819-824, March 2010.<br />

� M. Shafique, L. <strong>Bauer</strong>, J. Henkel, “enBudget: A Run-Time Adaptive Predictive Energy-Budgeting Scheme for<br />

Energy-Aware Motion Estimation in H.264/MPEG-4 AVC Video Encoder”, IEEE/ACM 13th Design Automation<br />

and Test in Europe Conference (DATE’10), Dresden, Germany, pp. 1725-1730, March 2010.<br />

� M. Shafique, L. <strong>Bauer</strong>, J. Henkel, “REMiS: Run-time Energy Minimization Scheme in a Reconfigurable Processor<br />

with Dynamic Power-Gated Instruction Set”, IEEE/ACM 27th International Conference on Computer-<br />

Aided Design (ICCAD’09), San Jose, California, USA, pp. 55-62, November 2009.<br />

� L. <strong>Bauer</strong>, M. Shafique, J. Henkel, “MinDeg: A Performance-guided Replacement Policy for Run-time Reconfigurable<br />

Accelerators”, IEEE International Conference on Hardware-Software Codesign and System Synthesis<br />

(CODES+ISSS’09), Grenoble, France, pp. 335-342, October 2009.<br />

� L. <strong>Bauer</strong>, M. Shafique, J. Henkel, “Cross-Architectural Design Space Exploration Tool for Reconfigurable<br />

Processors”, IEEE/ACM 12th Design Automation and Test in Europe Conference (DATE’09), Nice, France,<br />

pp. 958-963, April 2009.<br />

� M. Shafique, L. <strong>Bauer</strong>, J. Henkel, “A Parallel Approach for High Performance Hardware Design of Intra Prediction<br />

in H.264/AVC Video Codec”, IEEE/ACM 12th Design Automation and Test in Europe Conference<br />

(DATE’09), Nice, France, pp. 1434-1439, April 2009.<br />

� L. <strong>Bauer</strong>, M. Shafique, J. Henkel, “A Computation- and Communication-Infrastructure for Modular Special Instructions<br />

in a Dynamically Reconfigurable Processor”, IEEE 18th International Conference on Field Programmable<br />

Logic and Applications (FPL’08), Heidelberg, Germany, pp. 203-208, September 2008.<br />

� M. Shafique, L. <strong>Bauer</strong>, J. Henkel, “3-Tier Dynamically Adaptive Power-Aware Motion Estimator for<br />

H.264/AVC Video Encoding”, ACM/IEEE International Symposium on Low Power Electronics and Design<br />

(ISLPED’08), Bangalore, India, pp. 147-152, August 2008.<br />

� L. <strong>Bauer</strong>, M. Shafique, J. Henkel, “Run-time Instruction Set Selection in a Transmutable Embedded Processor”,<br />

ACM/IEEE/EDA 45th Design Automation Conference (DAC’08), Anaheim, CA, USA, pp. 56-61, June<br />

2008.<br />

Received a “European Network of Excellence on High Performance and Embedded Architecture and Compilation”<br />

HiPEAC Paper Award.<br />

� L. <strong>Bauer</strong>, M. Shafique, S. Kreutz, J. Henkel, “Run-time System for an Extensible Embedded Processor with<br />

Dynamic Instruction Set”, IEEE/ACM 11th Design Automation and Test in Europe Conference (DATE’08),<br />

Munich, Germany, pp. 752-757, March 2008.<br />

Received the DATE´08 Best Paper Award.<br />

� L. <strong>Bauer</strong>, M. Shafique, D. Teufel, J. Henkel, “A Self-Adaptive Extensible Embedded Processor”, IEEE/ACM<br />

First International Conference on Self-Adaptive and Self-Organizing Systems (SASO’07), Boston, MA, USA,<br />

pp. 344-347, July 2007.<br />

� L. <strong>Bauer</strong>, M. Shafique, S. Kramer, J. Henkel, “RISPP: Rotating Instruction Set Processing Platform”,<br />

ACM/IEEE/EDA 44th Design Automation Conference (DAC’07), San Diego, CA, USA, pp. 791-796, June<br />

2007.<br />

L. <strong>Bauer</strong>, July 17, 2012 5/6

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