Ionized physical vapor deposition of integrated circuit interconnects*

Phys. Plasmas, Vol. 5, No. 5, May 1998J. Hopwood1625FIG. 1. A partial cross section of a simplified integrated circuit. The expandedview shows a via that is lined with Ti and TiN and subsequentlyfilled with W or Al. Future materials are indicated in parentheses.to the thickness deposited on the top surface of the ILD.Next the via receives a barrier layer of TiN that protects theILD from corrosive effects of WF 6 during chemical vapordeposition of the tungsten via plug. Alternately, if aluminumis used as the plug material, the TiN acts as a wetting layerthat allows the sputtered aluminum to be reflowed 3 into thevia at elevated temperatures. In both cases, the TiN acts as adiffusion barrier between the plug and the ILD. The diffusionbarrier must be conformal to the via and it should be asthin as possible so that very little cross sectional area is occupiedby the somewhat resistive barrier material. Finally thelow-resistivity via plug material is deposited. This material isprogressing from W to Al, and eventually Cu. The overburdenof metal present on the ILD after deposition of the plugis removed by chemical-mechanical polishing. In the singledamascene process, these step are repeated for the depositionof the metal lines above the vias. A future alternative is thedual damascene process 4 in which the via and metal levelsare etched simultaneously. Then both the via and the metalline are filled with conducting materials and planarized byCMP in the final step. The dual damascene process reducesthe number of processing steps needed to fabricate a metallevel, but the requirements on the deposition process are considerablymore stringent.Aluminum-0.5% Cu metallization is projected to be replacedby pure copper. 5 Copper has a lower bulk electricalresistivity than AlCu 1.7 vs 3.2 -cm so that the interconnectdelay time RC may be decreased. Equally importantis copper’s ability to conduct higher current densitiesthan AlCu without failure of the thin lines due to electromigrationof the metal atoms. Since copper does not form aself-limiting oxide, copper interconnects will need to becompletely enveloped in a passivating diffusion barrier, mostlikely consisting of Ta and TaN layers.Although many technological challenges exist in the areasof lithography, low-permittivity dielectric materials andvia etching, this paper will focus on the directional depositionof barrier and plug materials. There are three potentialmethods of interconnect deposition: Physical vapor depositionPVD, chemical vapor deposition CVD, and electroplating.The CVD methods use elevated temperatures orplasma 6 to dissociate precursor species. Filling or lining ofhigh aspect ratio features is accomplished by fragmented precursorspecies with low sticking coefficients that are capableof reaching and depositing at the bottom of deep, narrowopenings. While highly conformal films can be depositedusing CVD, the cost and toxicity of the precursor materialsremains an issue. Plating is also an effective way of fillinghigh AR features. The plating baths, however, can be difficultto maintain, present a liquid waste hazard, and representa departure from the semiconductor industry’s preference fordry processing. PVD, and in particular sputtering, has longbeen the workhorse of the industry. The fundamental problemwith sputtering, however, is the sputtered species areejected from the solid target with a cos n () angulardistribution 7,8 which limits bottom coverage to approximately0.2 in structures with 2:1 ARs. Physical collimation 9of the sputtered flux by a honeycomb-shaped filter betweenthe target and wafer improves film conformality by trappingsputtered species with large angle trajectories. Bottomcoverage 10 of 2:1 features increases to 0.3–0.4, but the collimatorsignificantly reduces the deposition rate and may createparticles that reduce the yield of functional ICs.II. IONIZED PHYSICAL VAPOR DEPOSITION „I-PVD…I-PVD is a recent advance in PVD technology thatachieves directional deposition of metals by ionizing thesputtered or evaporated metal atoms and collimating theseions with the plasma sheath adjacent to the wafer as shownin Fig. 2. A high electron density (n e 10 11 cm 3 ), inert gasplasma between the target and the wafer is needed to ionizethe metal vapor. Strong ionization of the metal occurs sincethe electron temperature depends primarily on the ionizationpotential of the inert gas 15.7 eV for argon which is muchgreater than that of metals 6.0 and 7.7 eV for Al and Cu.The plasma source is commonly an electron cyclotron resonanceplasma 11–13 or inductively coupled plasma. 14–17The average distance that a sputtered neutral will travelbefore being ionized dictates the design of an I-PVD system.Simple analysis of a sputtered neutral traversing a high densityplasma gives the ionization mean free path 18,19 as iz s /K i n e where s is the velocity of the sputtered neutraland K i is the ionization rate constant see below. Atomssputtered from the target exhibit a Thomson distribution 20where the most probable energy is one half the surface bindingenergy (1.5 eV for Al. Therefore, iz 60 cm in anAr plasma where T e 3 eV and n e 510 11 cm 3 . Thisanalysis suggests two methods of generating a highly ionized,directional metal flux. First, if the inert gas pressure isquite low, the target-to-wafer distance must be quite long.