Actel FPGAs - MSC Budapest Kft.

Actel FPGAsProduct Overview 2009Edition 9.1MICROCOMPUTERS • SYSTEMS • COMPONENTS • VERTRIEBS GMBHDISTRIBUTOR OF

ProASIC ® 3/EThe Low-Power, Low-Cost FPGA Solution/3EThe ProASIC3 series of flash FPGAs offers a breakthrough in power, price, performance,density, and features for today’s most demanding high-volume applications.ProASIC3 devices support the ARM Cortex-M1 processor, offering the benefits ofprogrammability and time-to-market at low cost. ProASIC3 devices are based onnonvolatile flash technology and support 15,000 to 3,000,000 gates and up to620 high-performance I/Os.n Low powern Single chip, single voltagen Nonvolatile, reprogrammablen Low costn Live at power-upn Maximum design securityn Firm-error immunen Clock managementn Advanced I/O standardsn User nonvolatile FlashROMn Secure ISPn High performanceProASIC3/E Devices A3P015 A3P030 A3P060 A3P125 A3P250 A3P400 A3P600 A3P1000 A3PE600 A3PE1500 A3PE3000Cortex-M1 Devices M1A3P250 M1A3P400 M1A3P600 M1A3P1000 M1A3PE1500 M1A3PE3000System Gates 15,000 30,000 60,000 125,000 250,000 400,000 600,000 1,0000,000 600,000 1,500,000 3,000,000Typical Equivalent128 256 512 1,024 2,048 — — — — — —MacrocellsVersaTiles (D-flip-flops) 384 768 1,536 3,072 6,144 9,216 13,824 24,576 13,824 38,400 75,264RAM kbits (1,024 bits) — — 18 36 36 54 108 144 108 270 5044,608-Bit Blocks — — 4 8 8 12 24 32 24 60 112FlashROM Bits 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000Secure (AES) ISP 1 — — Yes Yes Yes Yes Yes Yes Yes Yes YesIntegrated PLLs with CCC — — 1 1 1 1 1 1 6 6 6VersaNet Globals 6 6 18 18 18 18 18 18 18 18 18I/O Banks 2 2 2 2 4 4 4 4 8 8 8Maximum User I/Os 49 81 96 133 157 194 235 300 270 444 620QN48QN68QN68QN132 QN132 QN132 QN132 2VQ100 VQ100 VQ100 VQ100TQ144TQ144Package PinsPQ208 PQ208 PQ208 PQ208 PQ208 PQ208 PQ208 PQ208FG144 FG144 FG144 FG144 FG144 FG144FG256 2 FG256 FG256 FG256 FG256FG324FG484 FG484 FG484 FG484 FG484 FG484FG676FG8961. 2.AES is not available for Cortex-M1 ProASIC3 devices. The M1A3P250 device does not support this package.2

ProASIC ® 3 nanoThe Lowest Cost Solution with Enhanced I/O CapabilitiesnanonanoActel’s innovative ProASIC3 nano devices bring a new level of value and flexibility tohigh volume markets. When measured against the typical project metrics ofperformance, cost, flexibility and time-to-market, ProASIC3 nano devices provide anattractive alternative to ASICs and application-specific standard products (ASSPs)in fast moving or highly competitive markets. Customer-driven total system costreduction was a key design criteria for the ProASIC3 nano program. Reduced devicecost, availability of known good die, a single chip implementation, and a broad selectionof small footprint packages, all contribute to lower total system costs.n 1.5 V core for low powern Known good die supportedn 350 MHz system performancen Embedded SRAM NVMn Firm-error immunen Enhanced commercial temperaturen Enhanced I/O featuresn ISP and securityn Reprogrammable flash technologyn Zero lead time on selected devicesn CCCs and PLLsProASIC3 nano Devices A3PN010 A3PN015 A3PN020 A3PN030 A3PN060 A3PN125 A3PN250System Gates 10,000 15,000 20,000 30,000 60,000 125,000 250,000Typical Equivalent Macrocells 86 128 172 256 512 1,024 2,048VersaTiles (D-flip-flops) 260 384 520 768 1,536 3,072 6,144RAM kbits (1,024 bits) — — — — 18 36 364,608-Bit Blocks — — — — 4 8 8FlashROM Bits 1,000 1,000 1,000 1,000 1,000 1,000 1,000Secure (AES) ISP — — — — Ye s Ye s Ye sIntegrated PLLs with CCC — — — — 1 1 1VersaNet Globals 4 4 4 6 18 18 18I/O Banks 2 3 3 2 2 2 4Maximum User I/Os 34 49 52 81 71 71 68Known Good Die User I/Os 34 — 52 83 71 71 68QN48QN48Package PinQN68 QN68 QN68QN100 QN100 QN100VQ100 VQ100 VQ100 VQ100ProASIC3 Starter Kitn Evaluation board with an3PE1500-PQ208 silicon device– Eight I/O banks for ProASIC3E(six for ProASIC3): two can beindependently set to 1.5 V, 1.8 V,2.5 V, or 3.3 V (one for ProASIC3);four are fixed at 3.3 V (applies toProASIC3); and two are fixed at2.5 V (applies to ProASIC3E).– Clocks: Oscillator for system clockand manual clock option are provided– Eight LEDs and four switches providesimple inputs and outputs to thesystem.– LCD display module– Two CAT5E RJ45 connectors forhigh-speed LVDS communications– Two programming headers supportin-system programming (ISP) ofsingle and JTAG-chained boardsusing FlashPro3n FlashPro3 programmern Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsGet your tool at www.msc-toolguide.com/actel3

ProASIC ® 3LBalancing Low Power, Performance, and Low CostProASIC3L FPGAs feature 40 percent lower dynamic power and 90 percent lowerstatic power than the previous generation ProASIC3 FPGAs and orders ofmagnitude lower power than SRAM competitors, combining dramatically reducedpower consumption with up to 350 MHz operation. The ProASIC3L family alsosupports the free implementation of an FPGA-optimized 32-bit ARM Cortex-M1processor, enabling system designers to select the Actel flash FPGA solution thatbest meets their speed and power design requirements, regardless of applicationor volume. Optimized software tools using power-driven layout (PDL) provideinstant power reduction capabilities.n Low power 1.2 V to 1.5 V coreoperationn 700 Mbps DDR, LVDS capable I/Osn Up to 350 MHz system performancen Enhanced I/O featuresn Embedded SRAM and NVMn Firm-error immunen ISP and securityn Flash*Freeze technology forlowest powern Reprogrammable flash technologyn CCCs and PLLsProASIC3L Devices A3P250L A3P600L A3P1000L A3PE3000LCortex-M1 Devices M1A3P600L M1A3P1000L M1A3PE3000LSystem Gates 250,000 600,000 1,000,000 3,000,000VersaTiles (D-flip-flops) 6,144 13,824 24,576 75,264RAM kbits (1,024 bits) 36 108 144 5044,608-Bit Blocks 8 24 32 112FlashROM Bits 1,000 1,000 1,000 1,000Secure (AES) ISP* Yes Yes Yes YesIntegrated PLLs with CCC 1 1 1 6VersaNet Globals 18 18 18 18I/O Banks 4 4 4 8Maximum User I/Os 157 235 300 620VQ100PQ208 PQ208 PQ208 PQ208FG144 FG144 FG144Package PinsFG256 FG256 FG256FG324FG484 FG484 FG484FG896* AES is not available for Cortex-M1 ProASIC3L devices.Cortex-M1 ProASIC3 Development Kitn Development board with anM1A3P1000-FGG484 device– RoHS compliant– Full current measurement capabilityof independent I/O banks and VCC foraccurate power analysis– Oscillator for system clock isprovided– Eight LEDs and eight switchesprovide simple inputs and outputs tothe system.– USB programming and debugconnection– Second USB connection forUSB-to-serial (RS232) interface– Optional board power connectorfor an external supply, but none isneeded when connected to an USBcable– Memory devices– 1 MB of SRAM provided on board– 16 MB of flash memory providedon board– General purpose I/O banks –Three 40-pin GPIO banks areprovided for interfacing to otherequipment. Two of these banks arefully populated.n FlashPro3 programmer built intoboardn Power supplyn Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsGet your tool at www.msc-toolguide.com/actel4

ProASIC ® 3 for AutomotiveFrom Concept to ProductionTActel’s T-Grade Automotive ProASIC3 FPGAs offer Grade 2 (TA =105°C / TJ=115°C)and Grade 1 (TA=125°C / TJ=135°C) AECQ100-qualified devices. With densities up to1 M system gates, the Automotive ProASIC3 T-Grade FPGA is the only FPGA solutionoffering 135°C junction temperature on a high-density, feature-rich FPGA. ProASIC3T-Grade devices deliver an optimal combination of high reliability, neutron immunity,features and density to powertrain, safety, telematics, and infotainment applications.In addition to AECQ100 qualification and a TS 16949 certified Quality ManagementSystem, Actel offers PPAP documentation on ProASIC3 T-Grade devices.Based on our popular ProASIC3 flash product offerings, T-Grade Automotive ProASIC3FPGAs provide four new choices for advanced automotive systems.n AECQ Compliantn Two standard offerings:– Grade 2: –40°C to 105°C ambientwith absolute maximum junction115°C– Grade 1: –40°C to 125°C ambientwith absolute maximum junction135°Cn 100% temperature testingn Burn-in an available optionn Leaded and unleaded packagesofferedn ISO/TS 16949:2002 certifiedProASIC3 T-Grade A3P060 A3P125 A3P250 A3P1000System Gates 60 k 125 k 250 k 1 MEmbedded RAM Bits 18 k 36 k 36 k 144 kEmbedded RAM Blocks4,608-bit blocks)Maximum User I/Os(Std+/LVDS)4 8 8 3296 97 157/38 300/74VQ100 VQ100 VQ100FG144 FG144 FG144 FG144PackagesQN132QN132FG256FG256FG484All packages available in RoHS-compliant and standard leaded packages.5

IGLOO ® /e Low-Power Flash FPGAsThe Ultra-Low-Power Programmable SolutionThe Actel IGLOO family of reprogrammable, full-featured flash FPGAs is designed to meetthe demanding power, area, and cost requirements of today’s portable electronics. Based onActel’s nonvolatile flash technology, the 1.2 V to 1.5 V operating voltage family offers theindustry’s lowest power consumption – as low as 5 μW. The IGLOO family supports up to3,000,000 system gates with up to 504 kbits of true dual-port SRAM, up to 6 embedded PLLs,and up to 620 user I/Os. Low-power applications that require 32-bit processing can use theARM ® Cortex-M1 processor without license fee or royalties in M1 IGLOO devices. Developedspecifically for implementation in FPGAs, Cortex-M1 offers an optimal balance betweenperformance and size to minimize power consumption.n Ultra-low-power FPGAsn Reprogrammablen Flash*Freeze technology forlowest power consumptionn 1.2 V core voltagen 5 µW Flash*Freeze moden Live at power-upn Secure in-systemprogramming (ISP)n User nonvolatile FlashROMFlash*FreezeMode ControlFlash*Freeze PinIGLOO Devices AGL015 AGL030 AGL060 AGL125 AGL250 AGL400 AGL600 AGL1000 AGLE600 AGLE3000Cortex-M1 Devices M1AGL250 M1AGL400 M1AGL600 M1AGL1000 M1AGLE3000System Gates 15,000 30,000 60,000 125,000 250,000 400,000 600,000 1,000,000 600,000 3,000,000Typical Equivalent Macrocells 128 256 512 1,024 2,048 — — — — —VersaTiles (D-flip-flops) 384 768 1,536 3,072 6,144 9,216 13,824 24,576 13,824 75,264Flash*Freeze Mode (typical, |jW) 5 5 10 16 24 32 36 53 49 137RAM kbits (1,024 bits) — — 18 36 36 54 108 144 108 5044,608-Bit Blocks — — 4 8 8 12 24 32 24 112FlashROM Bits 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000Secure (AES) ISP1 — — Yes Yes Yes Yes Yes Yes Yes YesIntegrated PLLs with CCC — — 1 1 1 1 1 1 6 6VersaNet Globals 2 6 6 18 18 18 18 18 18 18 18I/O Banks 2 2 2 2 4 4 4 4 8 8Maximum User I/Os 49 81 96 133 143 194 235 300 270 620UC81CS81CS121CS196 CS196 CS196CS281 CS281QN48Package PinsQN68 QN68QN132 QN132 QN132 QN132 3, 4VQ100 VQ100 VQ100 VQ100FG144 4 FG144 FG144 FG144 FG144 FG144FG256 FG256 FG256 FG256FG484 FG484 FG484 FG484 FG484FG8961.AES is not available for Cortex-M1 IGLOO devices.2.Six chip (main) and twelve quadrant global networks are available for AGL060 and above3.The M1AGL250 device does not support this package.4.Device/package support TBD.6

IGLOO ® nanoThe Industry’s Lowest-Power, Smallest-Size SolutionActel’s IGLOO nano products offer groundbreaking possibilities in power, size, leadtimes,operating temperature, and cost. Available in logic densities from10,000 to 250,000 gates, the 1.2 V to 1.5 V IGLOO nano devices have been designedfor high-volume applications where power and size are key decisioncriteria. IGLOO nano devices are perfect ASIC or ASSP replacements, yet retain thehistorical FPGA advantages of flexibility and quick time-to-market in low-powerand small footprint profiles.n Ultra-low power in Flash*Freezemode, as low as 2 μWn Variety of small footprint packagesas small as 3x3 mmn Zero lead time on selected devicesn Known good die supportedn Enhanced commercial temperaturen Reprogrammable flash technologyn 1.2 V to 1.5 V single voltage operationn Enhanced I/O featuresn Clock conditioning circuits (CCCs)and PLLsn Embedded SRAM and nonvolatilememory (NVM)n ISP and securityIGLOO nano Devices AGLN010 AGLN015 AGLN020 AGLN030 AGLN060 AGLN125 AGLN250System Gates 10,000 15,000 20,000 30,000 60,000 125,000 250,000Typical Equivalent Macrocells 86 128 172 256 512 1,024 2,048VersaTiles (D-flip-flops) 260 384 520 768 1,536 3,072 6,144Flash*Freeze Mode(typical, |jW)2 4 4 5 10 16 24RAM kbits (1,024 bits) — — — — 18 36 364,608-Bit Blocks — — — — 4 8 8FlashROM Bits 1,000 1,000 1,000 1,000 1,000 1,000 1,000Secure (AES) ISP — — — — Yes Yes YesIntegrated PLLs with CCC — — — — 1 1 1VersaNet Globals 4 4 4 6 18 18 18I/O Banks 2 3 3 2 2 2 4Maximum User I/Os 34 49 52 81 71 71 68Known Good Die User I/Os 34 — 52 83 71 71 68UC36UC81 UC81CS81 CS81 CS81 CS81 CS81Package PinsQN48QN48QN68QN68QN100 QN100 QN100VQ100 VQ100 VQ100 VQ100IGLOO nano Starter Kitn Development board with anAGLN250-ZVQG100 device– RoHS compliant– Low-cost AGLN250-ZVQG100 device,which is pin-compatible withAGLN250-VQG100 device– Full current measurement capabilityof independent I/O banks and VCC foraccurate power analysis– Clocks: A 20 MHz system clock isprovided using an ultra-low-power,resistor-set, precision oscillator.– Three LEDs and three switchesprovide simple inputs and outputsto the system.– USB-to-UART connection forhyperterminal on a PC– Optional board power connectorfor an external supply, but none isneeded when connected to an USBcable– Ability to switch VCORE from1.2 V to 1.5 V– Lowest power 250,000 system gateFPGA– Dynamic, static, and Flash*Freezepower consumption are the lowestin the industry with under 25 μW inFlash*Freeze mode on the 250,000system gate AGLN250 device.– Three test LEDs– Two test switches mounted oneither side of the board and OLEDdisplay– All I/Os available for quick connectionto external circuitryn The Actel FlashPro3 programmeris built into the Low Cost ProgrammingStick (LCPS)– Plugs directly into the IGLOO nanoboard. An USB 2.0 high-speed cableplugs into the LCPS to enable the IG-LOO nano board to be programmed.n Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsGet your tool at www.msc-toolguide.com/actel7

IGLOO ® PLUSThe Low-Power FPGA with Enhanced I/O CapabilitiesActel’s IGLOO PLUS products deliver unrivaled low-power and I/O features in afeature-rich programmable device, offering up to 64 percent more I/Os than theaward-winning IGLOO products and supporting independent Schmitt trigger inputs,hot-swapping, and Flash*Freeze bus hold. Ranging from 30,000 to 125,000 gates,the 1.2 V to 1.5 V IGLOO PLUS devices have been optimized to meet the needs of I/Ointensive,power-conscious applications that require exceptional features.n I/O-optimized FPGAn Ultra-low power in Flash*Freezemode, as low as 5 μWn Low-power active capabilityn Small footprint and low-costpackagesn Reprogrammable flash technologyn 1.2 V to 1.5 V single voltageoperationn Enhanced I/O featuresn CCCs and PLLsn Embedded SRAM NVMn ISP and securityIGLOO PLUS Devices AGLP030 AGLP060 AGLP125System Gates 30,000 60,000 125,000Typical Equivalent Macrocells 256 512 1,024VersaTiles (D-flip-flops) 792 1,584 3,120Flash*Freeze Mode (typical, |jW) 5 10 16RAM kbits (1,024 bits) — 18 364,608-Bit Blocks — 4 8Secure (AES) ISP — Yes YesFlashROM Bits 1,000 1,000 1,000Integrated PLLs with CCC — 1 1VersaNet Globals 6 18 18I/O Banks 4 4 4Maximum User I/Os 120 157 212CS201CS201CS281Package PinsCS289 CS289 CS289VQ128VQ176IGLOO PLUS Starter Kitn Development board with anAGLP125-CSG289 device– RoHS compliant– Full current measurement capabilityof independent I/O banks and VCC foraccurate power analysis– Clocks: Oscillator for system clock isprovided– Eight LEDs and eight switches providesimple inputs and outputs to thesystem.– Programming stick connection– USB connection for USB-to-serial(RS232) interface also allowspowering of the board– Optional board power connector foroptional 5 V external supply providedwith kitn Power supplyn Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsGet your tool at www.msc-toolguide.com/actel8

IGLOO ® Evaluation KitsStarting Your IGLOO DesignIGLOO Icicle Kitn IGLOO Icicle Evaluation Board withAGL125-QNG132 device– RoHS compliant– Battery powered via included lithiumionbattery and built-in charger fromUSB cable– Full current measurement capabilityof independent I/O banks and VCC foraccurate power analysis– Lowest power 125,000 systemgateFPGA in the world– Ultra-low power consumption indynamic, static, and Flash*Freezemodes– Low power enables a long battery lifefor a typical portable device– Ability to switch VCC from 1.2 V to1.5 V as needed– Ultra-small QN132 (8 x 8 mm) devicefitted inside a ring of connectors for aVQ100 device. The evaluation boardhas been designed for use with eitherpackage.– Optional board power connectorfor an external supply, but none isneeded when connected to an USBcablen FlashPro3 programmer built intolow-cost programming stick (LCPS)– Plugs directly into IGLOO Icicleevaluation board. An USB 2.0 highspeedcable plugs into the LCPS forprogramming of the IGLOO device.n Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsIGLOO Starter Kit 1) / Cortex-M1 IGLOO Development Kit 2)n Development board with anAGL600-FGG256 device 1)M1AGL1000-FGG484 device 2)– RoHS compliant– AGL600-FGG256 device fitted into thecenter 16 x 16 of a 22 x 22 array 1)orM1AGL1000-FGG484 device fitted inthe 22 x 22 array 2)– Full current measurement capabilityof independent I/O banks and VCC foraccurate power analysis– Clocks: Oscillator for system clockis provided– Eight LEDs and eight switchesprovide simple inputs and outputs tothe system.– USB programming and debug– Second USB connection for USBtoserial(RS232) interface, also allowspowering of the board– Optional board power connectorfor an external supply, but none isneeded when connected to an USBcable– Memory devices– 4 MB of SRAM provided on board– 16 MB of flash memory providedon board– General purpose I/O banks– Three 40-pin GPIO banks areprovided for interfacing to otherequipment. Two of these banksare fully populated.n FlashPro3 programmer builtinto boardn Power supplyn Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsGet your tool at www.msc-toolguide.com/actel9

Fusion ®The World’s First Mixed-Signal FPGAActel Fusion integrates configurable analog, large flash memory blocks, comprehensiveclock generation and management circuitry, and high-performance, flash-basedprogrammable logic in a monolithic device. Actel’s innovative Fusion architecture canbe used with the Actel soft MCU core as well as the performancemaximized32-bit ARM Cortex-M1 cores. Fusion is the definitive mixed-signal FPGA platform.n Integrated A/D converter (ADC) with8-, 10-, and 12-bit resolution and30 scalable analog input channelsn ADC accuracy better than 1%n Current and voltage monitoringblocksn In-system configurable analog supportsa wide variety of applicationsn Up to 8 Mbits of user flash memoryn Extensive clocking resourcesn Analog PLLsn 1% RC oscillatorn Crystal oscillator circuitn Real-time counter (RTC)n Flash FPGA fabricn Reprogrammablen Live at power-upn Maximum design securityn Ultra-low powern Firm-error immunen Clock managementn Advanced I/O standardsn User nonvolatile FlashROMFusion Devices AFS090 AFS250 AFS600 AFS1500Cortex-M1 Devices* M1AFS250 M1AFS600 M1AFS1500System Gates 90,000 250,000 600,000 1,500,000GeneralInformationTiles (D-flip-flops) 2,304 6,144 13,824 38,400Secure (AES) ISP Yes Yes Yes YesPLLs 1 1 2 2Globals 18 18 18 18Flash Memory Blocks (2 Mbits) 1 1 2 4Total Flash Memory Bits 2,000,000 2,000,000 4,000,000 8,000,000MemoryFlashROM Bits 1,000 1,000 1,000 1,000RAM Blocks (4,608 bits) 6 8 24 60RAM kbits 27 36 108 270Analog Quads 5 6 10 10Analog Input Channels 15 18 30 30Analog and I/OsGate Driver Outputs 5 6 10 10I/O Banks (+ JTAG) 4 4 5 5Maximum Digital I/Os 75 114 172 252Analog I/Os 20 24 40 40* Refer to the Cortex-M1 product brief for more information.10

Fusion Starter KitsStarting Your Fusion DesignFusion Starter Kit Fusion Embedded Development Kit Fusion Advanced Development Kitn Evaluation board with anAFS600-FG256 Fusion device– Five I/O banks: two can beindependently set to 1.5 V or 3.3 V;two are fixed at 3.3 V; and one is forhigh voltage analog I/Os that supportdirect connection to voltages rangingfrom –12 V to +12 V.– On-chip 1% RC oscillator, a crystaloscillator circuit, and phase-lockedloops (PLLs) support system clockgeneration, manipulation, anddistribution– Eight LEDs and four switches providesimple inputs and outputs to thesystem.– On-board LCD displays values ofconverted analog signals (voltage,current, or temperature) and flashmemory contents– Multi-color LED illustrates temperaturechanges and pulse widthmodulation (PWM) fan control byvarying the brightness– 40-pin daughter card connector foruse with system boards developedby Actel, customers, or third-partypartners– Two programming headers supportin-system programming (ISP) ofsingle and JTAG-chained boardsusing FlashPro3.n FlashPro3 programmern Power supplyn Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsn Evaluation board with anM1AFS1500-FGG484 silicon device– RoHS compliant– Full 10/100 Ethernet interface– Blue OLED 96 x 16 pixel display– USB-to-UART interface– RealView debug header interface– 4,000,000 SRAM– Mixed signal interface– I2C interface– Built-in temperature monitor– Voltage potentiometer– Full current measurement capabilityof independent I/O banks and VCCfor accurate power analysis– Optional board power connector foroptional 5 V external supply providedwith kitn IGLOO Icicle Kit edge connector foruse with IGLOO Icicle accessorycardsn Programming stick included with kit– FlashPro3 style programmingn Power supplyn Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designsn Evaluation board with anM1AFS1500-FGG484 silicon device– RoHS compliant– Full 10/100 Ethernet interface– Blue OLED 96x16 pixel display– RealView debug header interface– 16 Mbit SRAM– 2 MByte SPI flash– 128 Mbit parallel flash interface– USB-to-UART interface– Micro Power Management (MPM)demonstration circuitry on board– Mixed signal interface– I2C interface– Built-in temperature monitor– Voltage potentiometer– Full current measurement capabilityof independent I/O banks and VCCfor accurate power analysisn IP demonstrator board Interface– The demonstrator board to whichthis connects includes circuitryfor 1553, CAN, and an interface forARINC 429 plug-in card.n Optional board power connector foroptional 5 V external supply,provided with kitn IGLOO Icicle kit edge connector foruse with IGLOO Icicle accessory cardsn Programming stick included with kit– FlashPro3 style programmingn Free one-year Libero IDE Goldlicense and softwaren Web download of Libero IDEsoftware CD– User’s guide and Libero IDE tutorial– PCB schematics and layout files– Example designs DevelopmentGet your tool at www.msc-toolguide.com/actel11

ProASIC PLUS Flash FPGAsThe Capabilities of ASICs with the Flexibility of FPGAsProASIC PLUS devices with FlashLock ® expand on all the features and benefits offeredby the ProASIC family. Based on Actel flash technology, ProASIC PLUS devices offerthe unique combination of reprogrammability and nonvolatility in a highdensityprogrammable logic product. ProASIC PLUS devices combine the advantagesof ASICs with the benefits of FPGAs, enabling engineers to leverage their existingASIC or FPGA design flows and tools.n Maximum design securityn Reprogrammablen Nonvolatilen Live at power-upn ASIC design flown Very low powern PLLs and LVPECL I/OAPA075 APA150 APA300 APA450 APA600 APA750 APA1000System Gates 75,000 150,000 300,000 450,000 600,000 750,000 1,000,000Max Registers 3,072 6,144 8,192 12,288 21,504 32,786 56,320EmbeddedRAM BitsEmbedded RAMBlocks (256x9)27 k 36 k 72 k 108 k 126 k 144 k 198 k12 16 32 48 56 64 88Max User I/Os 158 242 290 344 454 562 712TQ100TQ100TQ144FG144 FG144 FG144 FG144PQ208 PQ208 PQ208 PQ208 PQ208 PQ208 PQ208PackagesBG456 BG456 BG456 BG456 BG456 BG456FG256 FG256 FG256 FG256FG484FG484FG676FG676FG896FG896FG115212

Axcelerator Family of FPGAsHigh Performance System IntegrationThe latest antifuse FPGA family offered by Actel, Axcelerator, offers highperformance and unprecedented design security at densities of up to 2 millionequivalent system gates. Based upon the Actel AX architecture, Axcelerator hasseveral system-level features, such as embedded SRAM (with embedded FIFOcontrol logic), PLLs, segmentable clocks, chip-wide highway routing, and carrylogic. Based upon 0.15 µ, seven-layers-of-metal CMOS antifuse process technology,Axcelerator offers a level of performance previously only available inASIC technology.n 350 MHz system performancen 500+ MHz internal performancen 500+ MHz embedded FIFOsn PLL output up to 1 GHz and8 PLLs per devicen 6 levels of logic at 156+ MHzn 1.5 V, 1.8 V, 2.5 V, and 3.3 Vmixed-voltage operationn 8 I/O banks per devicen 8 global clocks per devicen 4.5 kbits variable-aspect RAMblocks with built-in FIFO controln Intelligent low-power operationn Secure programming technologyprevents reverse engineeringand design theftAX125 AX250 AX500 AX1000 AX2000System Gates 125,000 250,000 500,000 1,000,000 2,000,000Dedicated Registers 672 1,408 2,688 6,048 10,752Max. Registers (core) 1,344 2,816 5,376 12,096 21,504Embedded RAM Bits 18,432 55,296 73,728 165,888 294,912Embedded RAMBlocks (4,608 bits)4 12 16 36 64Max. User I/Os 168 248 336 516 684Max. Number ofLVDS Pairs84 124 168 258 342PLLs 8 8 8 8 8Global Clocks 8 8 8 8 8PackagesCS180FG256FG324PQ208PQ208FG256FG484 FG484 FG484FG676FG676FG896BG729FG896FG115213

eX, SX-A, and MX FPGAsLow-Power, Low-Cost, Single-Chip SolutionsWith a focused combination of features, eX can meet all of your power, speed, package,and price requirements. Optimized for wired and mobile e-appliances, eX enablesdesigners to use a flexible, single-chip FPGA for their traditional low-densityASIC requirements, without the long lead times and costly NRE charges.Actel SX-A devices can match the speed and performance of an ASIC. SX-A devicescan be used to generate system-wide savings by integrating multiple functions intoa low-cost, single-chip solution. Providing a combination of performance, security,and low power, SX-A decreases the premium for performance while providing asolution highly secure from reverse engineering.Featuring very low power consumption and the industry’s highest design security,MX FPGAs offer designers a reliable, single-chip ASIC alternative. Providing an efficient,flexible 5.0 V architecture, MX is an ideal platform for integrating your legacyPLDs into a single low-cost device. MX is a high-volume platform that enables solutionswithout compromising on cost and time.eX eX64 eX128 eX256System Gates 3,000 6,000 12,000Max I/Os 84 100 132Dedicated Flip-Flops 64 128 256Combinatorial Cells 128 256 512SX-A A54SX08/08A A54SX16/16P/16A A54SX32/32A A54SX/72ASystem Gates 12,000 24,000 48,000 108,000Max I/O 130 180 249 360DedicatedFlip Flops256 528 1,080 2,012Logic Modules 768 1,452 2,880 6,036MX A40MX02 A40MX04 A42MX09 A42MX16 A42MX24 A42MX36System Gates 3,000 6,000 14,000 24,000 36,000 54,000Max I/O 57 69 104 140 176 202DedicatedFlip Flops147 273 516 928 1,410 1,822Logic Modules 295 547 684 1,232 1,890 2,43814

Real Time Verification/ProgrammingFinishing the JobSilicon Explorer IIActel’s antifuse FPGAs contain internal probe circuitry that provides built-in,no-cost access to every node in a design, enabling 100% real-time observationand analysis of a device’s internal logic nodes without design iteration. SiliconExplorer II, an easy to use integrated verification and logic analysis tool for thePC, accesses the probe circuitry, enabling designers to complete the designverification process at their desks.n Real time access into internalnodes without design iterationn PC-hosted 18-channel logicanalyzer that connects easilyto a desktop or laptopn Up to 100 MHz asynchronousor 66 MHz synchronoussampling raten Graphical user interface forviewing and analysisn Portable and easy to usen 100% node observability builtinto all Actel antifuse partsn Serial port connection,no plug-in cardWith Silicon Explorer II, the designer will be able to improve productivity anddecrease time-to-market by removing the guesswork typically associated withthe process of system verification.ProgrammingActel offers several programming options, including Silicon Sculptor 3 and theFlashPro series. Actel also has programming solutions for production design andoffers volume programming services through distribution partners.Silicon Sculptor 3 is a high-speed, robust, single-device programmer for all Acteldevices. The compact Silicon Sculptor 3 programmer connects to a PC via USB2.0 and comes with standalone software for the PC. This device programmer isdesigned to allow concurrent programming of multiple units from the same PCwith speeds faster than those of previous Actel programmers. Up to 12 programmerscan be connected to a single PC using nested USB hubs.FlashPro3, FlashPro Lite, and FlashPro are compact and cost-effective ways toprogram Actel flash devices. They eliminate incompatibility problems and expensiveredesign costs, and offer faster time-to-market with their ISP capability.All programmers can be controlled by the same easy-to-use GUI and connect to aPC through an USB port for FlashPro3, parallel port for FlashPro Lite, and userselectedUSB or parallel port for FlashPro. FlashPro3 supports Fusion, IGLOO/e,and ProASIC3/E devices and is powered from the USB port. FlashPro Lite supportsProASIC PLUS devices only and is powered from the target board. The FlashPro programmersupports ProASIC PLUS and the older ProASIC devices.... and when the design is ready to go to production, MSC has a programmingsolution for that too (please read page 31).www.msc-ge.com/frame/en/2067-www15

Flash FPGA Selector GuideSystem Gatestyp.MacrocellsVersaTilesRAM(kbits)UserFlash ROMBitsUserFlashbitsMax.dig./analogI/OsMax. diff./I/O pairsCoreVoltageI/O VoltageSecureAES ISP *)APA075 75.000 - 3.072 27 - - 158 - 2,5V 2,5-3,3V -APA150 150.000 - 6.144 36 - - 242 - 2,5V 2,5-3,3V -ProASIC PLUSAPA300 300.000 - 8.192 72 - - 290 - 2,5V 2,5-3,3V -APA450 450.000 - 12.288 108 - - 344 - 2,5V 2,5-3,3V -APA600 600.000 - 21.504 126 - - 454 - 2,5V 2,5-3,3V -APA750 750.000 - 32.768 144 - - 562 - 2,5V 2,5-3,3V -APA1000 1.000.000 - 56.320 198 - - 712 - 2,5V 2,5-3,3V -A3P015 15.000 128 384 1K - 49 - 1,5V 1,5-3,3V -A3P030 30.000 256 768 1K - 81 - 1,5V 1,5-3,3V -A3P060 60.000 512 1.536 18 1K - 96 - 1,5V 1,5-3,3V YesProASIC3/EA3P125 125.000 1.024 3.072 36 1K - 133 - 1,5V 1,5-3,3V YesM1/A3P250 250.000 2.048 6.144 36 1K - 157 38 1,5V 1,5-3,3V Yes *)M1/A3P400 400.000 - 9.216 54 1K - 194 38 1,5V 1,5-3,3V Yes *)M1/A3P600 600.000 - 13.824 108 1K - 235 60 1,5V 1,5-3,3V Yes *)M1/A3P1000 1.000.000 - 24.576 144 1K - 300 74 1,5V 1,5-3,3V Yes *)A3PE600 600.000 - 13.824 108 1K - 270 135 1,5V 1,5-3,3V YesM1/A3PE1500 1.500.000 - 38.400 270 1K - 444 222 1,5V 1,5-3,3V Yes *)M1/A3PE3000 3.000.000 - 75.264 504 1K - 620 310 1,5V 1,5-3,3V Yes *)A3PN010 10.000 86 260 - 1K - 34 - 1,5V 1,5-3,3V -A3PN015 15.000 128 384 - 1K - 49 - 1,5V 1,5-3,3V -ProASIC3 nanoA3PN020 20.000 172 520 - 1K - 49 - 1,5V 1,5-3,3V -A3PN030 30.000 256 768 - 1K - 83 - 1,5V 1,5-3,3V -A3PN060 60.000 512 1.536 18 1K - 71 - 1,5V 1,5-3,3V YesA3PN125 125.000 1.024 3.072 36 1K - 71 - 1,5V 1,5-3,3V YesA3PN250 250.000 2.048 6.144 36 1K - 68 - 1,5V 1,5-3,3V YesProASIC3LA3P250L 250.000 - 6.144 36 1K - 157 38 1,2-1,5V 1,2-3,3V YesM1/A3P600L 600.000 - 13.824 108 1K - 235 60 1,2-1,5V 1,2-3,3V Yes *)M1/A3P1000L 1.000.000 - 24.576 144 1K - 300 74 1,2-1,5V 1,2-3,3V Yes *)M1/A3PE3000L 3.000.000 - 75.264 504 1K - 620 300 1,2-1,5V 1,2-3,3V Yes *)AGL015 15.000 128 384 - 1K - 49 - 1,2-1,5V 1,2-3,3V -AGL030 30.000 256 768 - 1K - 81 - 1,2-1,5V 1,2-3,3V -AGL060 60.000 512 1.536 18 1K - 96 - 1,2-1,5V 1,2-3,3V YesIGLOO/eAGL125 125.000 1.024 3.072 36 1K - 133 - 1,2-1,5V 1,2-3,3V YesM1/AGL250 250.000 2.048 6.144 36 1K - 143 35 1,2-1,5V 1,2-3,3V Yes *)M1/AGL400 400.000 - 9.216 54 1K - 194 38 1,2-1,5V 1,2-3,3V Yes *)M1/AGL600 600.000 - 13.824 108 1K - 235 60 1,2-1,5V 1,2-3,3V Yes *)M1/AGL1000 1.000.000 - 24.576 144 1K - 300 74 1,2-1,5V 1,2-3,3V Yes *)AGLE600 600.000 - 13.824 108 1K - 270 135 1,2-1,5V 1,2-3,3V YesM1/AGLE3000 3.000.000 - 75.264 504 1K - 620 310 1,2-1,5V 1,2-3,3V Yes *)AGLN010 10.000 86 260 - 1K - 34 - 1,2-1,5V 1,2-3,3V -AGLN015 15.000 128 384 - 1K - 49 - 1,2-1,5V 1,2-3,3V -IGLOO nanoAGLN020 20.000 172 520 - 1K - 52 - 1,2-1,5V 1,2-3,3V -AGLN030 30.000 256 768 - 1K - 77 - 1,2-1,5V 1,2-3,3V -AGLN060 60.000 512 1.536 18 1K - 71 - 1,2-1,5V 1,2-3,3V YesAGLN125 125.000 1.024 3.072 36 1K - 71 - 1,2-1,5V 1,2-3,3V YesAGLN250 250.000 2.048 6.144 36 1K - 68 - 1,2-1,5V 1,2-3,3V YesIGLOO PLUSAGLP030 30.000 256 792 1K - - - 1,2-1,5V 1,2-3,3V -AGLP060 60.000 512 1.584 18 1K - - - 1,2-1,5V 1,2-3,3V YesAGLP125 125.000 1.024 3.120 36 1K - - - 1,2-1,5V 1,2-3,3V YesAFS090 90.000 - 2.304 27 1K 2000000 75/20 22 1,5V 1,5-3,3V YesFusionM1/AFS250 250.000 - 6.144 36 1K 2000000 114/24 37 1,5V 1,5-3,3V YesM1/AFS600 600.000 - 13.824 108 1K 4000000 172/40 86 1,5V 1,5-3,3V YesM1/AFS1500 1.500.000 - 38.400 270 1K 8000000 252/40 126 1,5V 1,5-3,3V Yes*) AES is not available for these devices: M1A3P/E; M1A3PL; M1AGL/E**) Device / package support TBD; ARM-enabled devices are not supporting these packages+) Packages only available as RoHS-compliant++) AFS250 and AFS600 PQ208-devices are not pin-compatible16

Versa NetGlobalsInt.PLLincl. CCCSlewRateControlTempRangeFF-mode(typ. µW)PQFP VQFP TQFP QFN BGA208 100 128 176 100 144 48 68 100 108 +) 132 180 4564 2 Yes C,I,A - 158 66 1074 2 Yes C,I,A - 158 66 2424 2 Yes C,I,A,M - 158 2904 2 Yes C,I,A - 158 3444 2 Yes C,I,A,M - 158 3564 2 Yes C,I,A - 158 3564 2 Yes C,I,A,M - 158 3566 - - C,I - 496 - - C,I - 77 34 49 8118 1 Yes C,I,T - 71 91 8018 1 Yes C,I,T - 133 71 100 8418 1 Yes C,I,T - 151/34 68/13 87/1918 1 Yes C,I - 151/3418 1 Yes C,I - 154/3518 1 Yes C,I,T - 154/3518 6 Yes C,I - 147/6518 6 Yes C,I - 147/6518 6 Yes C,I - 147/654 - - C,I - 344 - - C,I - 494 - - C,I - 496 - - C,I - 77 34 4918 1 Yes C,I - 71 7118 1 Yes C,I - 71 7118 1 Yes C,I - 68 6818 1 Yes C,I - 151/34 68/1318 1 Yes C,I - 154/3518 1 Yes C,I - 154/3518 6 Yes C,I,M - 147/656 - - C,I 5 496 - - C,I 5 77 34 49 8118 1 Yes C,I 10 71 8018 1 Yes C,I 16 71 8418 1 Yes C,I 24 68/13 87/19 **)18 1 Yes C,I 3218 1 Yes C,I 3618 1 Yes C,I 5318 6 Yes C,I 4918 6 Yes C,I 1374 - - C,I 2 344 - - C,I 4 494 - - C,I 4 496 - - C,I 5 77 34 4918 1 Yes C,I 10 71 7118 1 Yes C,I 16 71 7118 1 Yes C,I 24 58 686 - - C,I 5 10118 1 Yes C,I 10 13718 1 Yes C,I 1618 1 Yes C,I - 37/9 +) 60/16 +)18 1 Yes C,I - 93/26 ++) 65/15 +)18 2 Yes C,I - 95/46 ++)18 2 Yes C,I17

FBGA CSP UCG144 256 324 484 676 896 1152 81 121 196 201 281 289 36 81KnownGood Die100100 186100 186100 186 344186 370 454454 562642 712969797/24 157/3897/25 178/38 194/3897/25 177/43 235/6097/25 177/44 300/74165/79 270/135280/139 444/222221/110 341/168 620/31034528371716897/24 157/3897/25 177/43 235/6097/25 177/44 300/74221/110 341/168 620/30066 6696 **) 9697 13397/24 143/3597/25 178/38 194/38 143/3597/25 177/43 235/60 215/5397/25 177/44 300/74 215/53165/79 270/135341/168 620/31023 3452 52 5266 66 8360 7160 7160 68120 120157 157212 21275/22114/37119/58 172/86119/58 223/109 252/12618

Antifuse FPGA Selector GuideSystemGatesDedicatedFlip-FlopsMaxFlips-FlopsSRAMBitsMax.dig./analogI/O avail.Max I/OSingleEndedMaxI/O DoubleEnded1.5 VCMOSDrive1.8 VCMOSDrive2.5 VCMOSDrive3.3 VCMOSDrive5 VCMOSDrive5 VTolerantInputs3.3 VPCI I/O5 VPCI I/OSlewRateControlRoutedClocksHardwiredClocks PLL JTAGAX125 125,000 672 1,344 18 k 168/- 168 84 Yes Yes Yes Yes — — Yes Yes 1 Yes 4 4 8 YesAxceleratorAX250 250,000 1,408 2,816 55 k 248/- 248 124 Yes Yes Yes Yes — — Yes Yes 1 Yes 4 4 8 YesAX500 500,000 2,688 5,376 74 k 336/- 336 168 Yes Yes Yes Yes — — Yes Yes 1 Yes 4 4 8 YesAX1000 1,000,000 6,048 12,096 166 k 516/- 516 258 Yes Yes Yes Yes — — Yes Yes 1 Yes 4 4 8 YesAX2000 2,000,000 10,752 21,504 295 k 684/- 684 342 Yes Yes Yes Yes — — Yes Yes 1 Yes 4 4 8 YeseX64 3,000 64 128 — 84/- — — — — Yes Yes Yes Yes — — Yes 2 1 — YeseXeX128 6,000 128 256 — 100/- — — — — Yes Yes Yes Yes — — Yes 2 1 — YeseX256 12,000 256 512 — 132/- — — — — Yes Yes Yes Yes — — Yes 2 1 — YesA54SX08A 12,000 256 512 — 130/- — — — — Yes Yes Yes Yes Yes Yes Yes 2 1 — YesSX-AA54SX16A 24,000 528 990 — 180/- — — — — Yes Yes Yes Yes Yes Yes Yes 2 1 — YesA54SX32A 48,000 1,080 1,980 — 249/- — — — — Yes Yes Yes Yes Yes Yes Yes 2 1 — YesA54SX72A 108,000 2,012 4,024 — 360/- — — — — Yes Yes Yes Yes Yes Yes Yes 6 1 — YesA54SX08 12,000 256 512 — 130/- — — — — — Yes — Yes — — — 2 1 — YesSXA54SX16 24,000 528 990 — 175/- — — — — — Yes — Yes — — — 2 1 — YesA54SX16P 24,000 528 990 — 175/- — — — — — Yes Yes Yes Yes Yes — 2 1 — YesA54SX32 48,000 1,080 1,980 — 249/- — — — — — Yes — Yes — — — 2 1 — YesA40MX02 3,000 — 147 — 57/- — — — — — Yes Yes Yes — — — 1 — — —A40MX04 6,000 — 273 — 69/- — — — — — Yes Yes Yes — — — 1 — — —MXA42MX09 14,000 348 516 — 104/- — — — — — Yes Yes Yes — — — 2 — — —A42MX16 24,000 624 928 — 140/- — — — — — Yes Yes Yes — — — 2 — — —A42MX24 36,000 954 1,410 — 176/- — — — — — Yes Yes Yes Yes Yes — 2 — — YesA42MX36 54,000 1,230 1,822 2,560 202/- — — — — — Yes Yes Yes Yes Yes — 6 — — Yes1With the use of an external resistor C – Commercial I – Industrial A – Automotive M – MilitaryT – Automotive Temperature Range: Grade 2 and Grade 1 AECQ100 Grade 2: 105°C TA 115°C TJ Grade 1: 125°C TA 135°C TJFBGAFG1152f ProASIC PLUS1Axceleratorps 35 x 35 mmh 2.23 mmp 1.0 mmFG896f IGLOOeProASIC3E/LProASIC PLUS 1Axceleratorps 31 x 31 mmh 2.23 mmp 1.0 mmFG676f FusionProASIC3EProASIC PLUSAxceleratorps 27 x 27 mmh 2.23 mmp 1.0 mmFG484f SX-Aps 27 x 27 mmh 2.23 mmp 1.0 mmFG484f FusionIGLOOIGLOOeProASIC3 3 /E/LProASIC PLUS 2Axceleratorps 23 x 23 mmh 2.23 mmp 1.0 mmFG324f ProASIC3/E/LAxceleratorps 19 x 19 mmh 1.63 mmp 1.0 mmFG256f FusionIGLOOIGLOOeProASIC3 3 /E/LProASIC PLUS 2AxceleratorSX-Aps 17 x 17 mmh 1.6 mmp 1.0 mmKey:f –familyps –package sizeh –package thicknessp –pin pitch/ball pitchFG144f IGLOOProASIC3/LProASIC PLUSSX-ASXps 13 x13 mmh 1.45 mmp 1.0 mm19

33 MHzPCI66 MHzPCITemp RangeSpeed GradesPLCC PQFP VQFP TQFP BGA FBGA CSP44 68 84 100 160 208 240 80 100 64 100 144 176 272 313 329 729 144 256 324 484 676 896 1152 49 128 180Yes Yes C,I Std., -1, -2 138 168 98Yes Yes C,I,M Std., -1, -2 115 138 248Yes Yes C,I,M Std., -1, -2 115 317 336Yes Yes C,I,M Std., -1, -2 516 317 418 516Yes Yes C,I,M Std., -1, -2 586 684— — C,I,A -F, Std., -P 41 56 36 84— — C,I,A -F, Std., -P 46 70 36 100— — C,I,A -F, Std., -P 81 100 132Yes Yes C,I,A -F, Std., -1, -2, 130 81 113 111Yes Yes C,I,A,M -F, Std., -1, -2, 175 81 113 111 180Yes Yes C,I,A,M -F, Std., -1, -2, 174 81 113 147 249 111 203 249Yes Yes C,I,A,M -F, Std., -1, -2, 171 203 360— — C,I,M Std., -1, -2,-3 69 130 81 113 128 111— — C,I,M Std., -1, -2,-3 175 81 147Yes Yes C,I,M Std., -1, -2,-3 175 81 113 147— — C,I,M Std., -1, -2,-3 174 113 147 249 249— — C,I,A,M -F, Std., -1, -2,-3 34 57 57 57— — C,I,A,M -F, Std., -1, -2,-3 34 57 69 69 69— — C,I,A,M -F, Std., -1, -2,-3 72 83 101 83 104— — C,I,A,M -F, Std., -1, -2,-3 72 83 125 140 83 140Yes — C,I,A,M -F, Std., -1, -2,-3 72 125 176 150Yes — C,I,A,M -F, Std., -1, -2,-3 176 202 2022Not all speed grades are available for all temperature ranges. Please refer to the Actel website and appropriate product datasheets for the latest device information and valid ordering codes.BGABG729f Axceleratorps 35 x 35 mmh 2.33 mmp 1.27 mmBG456f ProASIC PLUSps 35 x 35 mmh 2.33 mmp 1.27 mmBG329f SX-ASXps 31 x 31 mmh 2.33 mmp 1.27 mmBG313f SXps 35 x 35 mmh 2.33 mmp 1.27 mmBG272f MXps 27 x 27 mmh 2.33 mmp 1.27 mmQFNQN180f Fusionps 10 x 10 mmh 0.75 mmp 0.50 mmQN132f ProASIC3IGLOOps 8 x 8 mmh 0.75 mmp 0.50 mmQN108f Fusionps 8 x 8 mmh 0.75 mmp 0.50 mmQN100f IGLOO nanoProASIC3 nanops 8 x 8 mmh 0.85 mmp 0.50 mmQN68f IGLOOIGLOO nanoProASIC3ProASIC3 nanops 8 x 8 mmh 0.90 mmp 0.40 mmQN48f IGLOOIGLOO nanoProASIC3ProASIC3 nanops 6 x 6 mmh 0.90 mmp 0.40 mm

CSPTQFPCS289f IGLOO Plusps 14 x 14 mmh 1.20 mmp 0.80 mmCS281f IGLOO^ IGLOO Plusps 10 x 10 mmh 1.05 mmp 0.50 mmCS201f IGLOO Plusps 8 x 8 mmh 0.89 mmp 0.50 mmCS196f IGLOOps 8 x 8 mmh 1.11 mmp 0.5 mmTQ176f SX-ASXMXbs 24 x 24 mmps 26 x 26 mmh 1.4 mmp 0.5 mmCS180f eX,Axceleratorps 13 x 13 mmh 1.35 mmp 0.8 mmCS81f IGLOO/nanops 5 x 5 mmh 0.8 mmp 0.5 mmCS128f eXps 11 x11 mmh 1.35 mmp 0.8 mmCS49f eXps 7 x 7 mmh 1.35 mmp 0.8 mm1FG896 and FG1152 are footprint compatible for ProASICPLUS.2FG256 and FG484 are footprint compatible for ProASICPLUS.3FG256 and FG484 are footprint compatible for ProASIC3 andProASIC3E.CS121f IGLOOps 6 x 6 mmh 0.9 mmp 0.5 mmUCUC81f IGLOOIGLOO nanops 4 x 4 mmh 0.80 mmp 0.40 mmUC36f IGLOO nanops 3 x 3 mmh 0.80 mmp 0.40 mmThe bs dimension is the package body dimension exclusiveof leads. The ps dimension is the overall package dimensioninclusive of leads.Refer to the Actel Package Mechanical Drawings documentlocated at:http://www.actel.com/documents/PckgMechDrwngs.pdffor more information concerning package dimensions.TQ144f ProASIC3ProASIC PLUSSX-ASXbs 20 x 20 mmps 22 x 22 mmh 1.4 mmp 0.5 mmTQ100f ProASIC PLUSSX-AeXbs 14 x 14 mmps 16 x 16 mmh 1.4 mmp 0.5 mmTQ64f eXps 10 x 10 mmh 1.4 mmp 0.5 mmVQFPVQ176f ProASIC PLUSIGLOO Plusbs 20 x 20 mmps 22 x 22 mmh 1.0 mmp 0.4 mmVQ128f IGLOO Plusbs 14 x 14 mmps 16 x 16 mmh 1.0 mmp 0.4 mmVQ100f IGLOO nanoProASIC3/L/ nanoSXMXbs 14 x 14 mmps 16 x 16 mmh 1.0 mmp 0.5 mmVQ80f MXbs 14 x 14 mmps 16 x 16 mmh 1.0 mmp 0.65 mmPQFPPQ240f MXps 32 x 32 mmh 3.40 mmp 0.50 mmPQ208f ProASIC3/3E/LFusionProASIC PLUSSX-ASXMXAxceleratorps 28 x 28 mmh 3.40 mmp 0.50 mmPQ160f MXps 28 x 28 mmh 3.37 mmp 0.65 mmPQ100f MXps 14 x 20 mmh 2.80 mmp 0.65 mm21

Evaluation & Testing EquipmentStarting Your DesignActel Starter KitsLow-cost starter kits are a quick and cost-effective way to assess an FPGA technology,without the expense and time needed to design a specialized evaluation board.Unlike a specific technology demonstrator board, which would only be applicable toone application area, a starter kit board contains the FPGA and, for a flash-baseddevice, a programming interface and associated programmer, as well as programmingand design software. Actel offers Fusion, IGLOO/e, ProASIC3/E, ProASIC PLUS ,and Axcelerator Starter Kits.n M1-Starter Kitsn IGLOO Eval-Kitsn A3P-Eval-Kitsn ProASIC3 Eval-Kitsn Fusion Eval-Kitsn Core PCI Evaluation Boardn 8051 Development Kitn µTCA Starter Kitn ProASIC PLUS ISP Evaluation Boards;AX Evaluation Boardsn Evaluation Test Sockets (BGA,CQFP, CSP, PQFP, TQFP, VQFP)n Adapter Boards for Prototyping(e.g. 256-pin CQFP to 484-pin FBGA,208-pin PQFP SXA to 208-pin PQFP ProASIC etc.)and many more...Get your tool at www.msc-toolguide.com/actel22

Secured by ActelActel FPGAs and Design SecuritySecure systems and ultimately the underlying silicon technologies are becomingincreasingly vital in preventing corruption, intrusion, and ultimately the theft of yourvaluable IP. Without taking the necessary precautions, corporations experiencemajor security breaches, resulting in design theft and other malicious damage.Quantifying these risks and the potential associated loss can be a difficult taskbut should be included in the decision process for every new project within yourorganization. A careful security review of your current system would probably revealsome gaping holes. Today Actel has the solution to secure your design. Actel offersa comprehensive portfolio of high security programmable logic solutions to makesecuring your designs easier and more cost-effective. The Actel solution is a rangeof nonvolatile, single-chip FPGAs that offer virtually unbreakable design security tomeet your most demanding design requirements.n All Actel FPGAs maintain your datainternally in the chip. There is noexternal bitstream or boot PROMto be compromised.n No optical change is visible in aprogrammed antifuse, making invasiveanalysis effectively impossibleeven with access to SEMs and otheradvanced technologies.n The Actel Flash technology usedin Fusion, IGLOO, ProASIC3/E andProASIC PLUS families is secured witha powerful security key.n ProASIC3/E devices have a 128-bitFlash-based lock and industryleading128-bit AES decryption, usedto secure programmed IP and configurationdata.n It is virtually impossible to determinethe state of a given Flash elementvia invasive methodologies withoutdestroying the element itself.Look for this symbol to ensure that your valuable IP is secure.All Fusion, IGLOO/e, ProASIC3/E, and ProASIC PLUS devices are secured byunique FlashLock technology from Actel. In addition, Fusion, IGLOO/e,and ProASIC3/E devices provide the advantage of on-chip AES decryptionand MAC authentication for secure programming.The Actel FuseLock TM advantage ensures that unauthorized users will not be ableto read back the contents of an Actel antifuse FPGA. Combined with special hiddensecurity fuses that prevent internal probing and overwriting, Actel antifuse FPGAskeep your valuable IP yours.23

Low PowerUnderstanding the Power Profile of FPGAsWhen evaluating programmable technologies, there are five components of theFPGA power profile that must be considered: inrush current, configuration current,static power, dynamic power, and sleep mode power. Unlike SRAM FPGAs, flash andantifuse FPGAs have no power-up or configuration power components.Lowest Total System Power Consumption: Actel flash-based FPGAs offer the industry’slowest static power consumption for handheld applications. Typical static powerconsumption in static mode is as low as 5 μW on IGLOO flash FPGAs in Flash*Freezemode. Offering low dynamic power consumption and no configuration or inrush currentmakes Actel FPGAs the FPGAs with the lowest total system power.PowerTime (or frequency)Example of system power (over time)Sleep Mode Power: Actel devices have a variety of sleep and standby modes thatreduce power to microwatts. IGLOO FPGAs implement Flash*Freeze mode, whichconsumes as little as 5 μW while retaining the SRAM, register, and I/O information.Static Power: SRAM-based FPGAs consume significantly more static power than dotheir flash and antifuse counterparts. At room temperature, this difference may onlybe tens of milliamps; at higher operating temperatures, this difference can exceed100 milliamps. Actel IGLOO devices consume as little as 25 μW in static mode.Dynamic Power: Dynamic power is a function of the switching frequency andoperating temperature. All FPGA technologies exhibit similar dynamic powerperformance. Actel IGLOO devices can operate from a 1.2 V core voltage, enablinga further reduction of dynamic power.Inrush Current: When an SRAM FPGA powers up, its initialization process cancreate a current surge that may generate a spike as high as several amps for aslong as a few hundred microseconds.Configuration Current: During SRAM configuration, a bitstream is downloaded tothe ice, and the various configuration bits are programmed, often drawing morethan 100 milliamps for hundreds of milliseconds.Firm ErrorsCould Your SRAM FPGA Lose Its Configuration?Programmable logic devices based on SRAM technology, used in high-reliabilityapplications at ground level and high altitudes, are susceptible to single-event errorswhere alpha and neutron radiation causes loss of configuration data. The loss of theunderlying FPGA configuration is called a “firm error”, and it will remain until detectedand corrected. In contrast, a “soft error” is the transient corruption of a single bit ofdata. Firm errors can cause system-level functional failure, and are very difficult toprevent and correct.Neutron and alpha radiation do not have adverse effects on Actel antifuse andflash-based FPGAs. Actel offers extremely reliable FPGAs for many applications,including military, aerospace, industrial control, medical, automotive, networking,and communications.24

FPGAs for Space ApplicationsA History of Success Serving the Space MarketDedicated to providing FPGAs that meet the stringent radiation and quality requirementsof space applications,Actel is the world’s leading supplier of radiationhardenedand radiationtolerant FPGAs. Over the last six years, Actel devices havebeen on board more than 100 launches and have been accepted for flight-criticalapplications on over 250 satellites.Actel continues its commitment to the space community with the RTSX-SU andRTAX-S/SL FPGA families. Designed specifically for space, the RTSX-SU andRTAX-S/SL products are built on a foundation of hardened latches, eliminating theneed for software-generated triple-module redundancy (TMR) or othersingle-eventupset (SEU) mitigation techniques.n TTotal dose capabilities up to 300krad (functional)n Single-event latch-up (SEL) immuneto ETTH up to 117 MeV-cm2/mgn SEU immune to LETTH up to37 MeV-cm2/mgn Single-event transient (SET)—highfrequencyn esting to 150 MHz with noanomalies observedn RTAX-SL low-power option with halfthe standby current of standard productsunder worst-case conditionsn Pin-compatible commercial devicesfor easy and inexpensive prototypingn Lower-cost non-hermetic PROTOunits that offer the same footprint andtiming characteristics as flight units(for RTAX-S/SL and RTSX-SU families)n B-flow (MIL-STD 883B), E-flow (ActelExtended Flow), and EV-flow (Class Vflow processing)n Ceramic package offerings(CQFP, CCGA, LGA, CCLG, CPGA)RTAX-S RTSX-SU RT-PROASIC3 Other RTProductsRTAX250S/SLRTSX32SURT3PE600LRT1280 RT1425RTAX1000S/SLRTSX72SURT3PE3000LRTAX2000S/RTAX2000S/SL/DSL RTAX4000SRTAX4000S/DRT1460 RT14100System Gates 250 k to 4 M 48 k to 108 k 600 k to 3 M 2.5 k to 20 kMax. I/Os 248 to 840 224 (RTSX32SU)270 to 620 100 to 228353 (RTSX72SU)Logic Modules 4,224 to 60,480 2,880 to 6,048 13,824 to 75,264 310 to 1,377RAM (kbits) 54 to 540 None 108 to 504 NoneSingle Event Latch-Up (SEL) ImmuneIn heavy ion radiation testing, Actel FPGAs have demonstrated immunity to single event latch-up at LET levels up to 117 MeV-cm 2 /mg.25

FPGAs for Military/Aerospace ApplicationsBecause Failure is Not an OptionMilitary/aerospace FPGA products from Actel, including antifuse and flash products,deliver reliable and secure performance. From military-temperature-tested plasticdevices to fully QML-qualified Class Q ceramic package devices, Actel FPGAs offera wide range of device sizes, screening levels, packaging choices, and price points.Actel military FPGAs have very low failure-in-time (FIT) rates, making them highlyreliable for long hours of continuous operation under extreme conditions.n Very low Failures-In-Time (FIT) ratesn Full QML certificationn Military temperature plastic devicesfrom 2,000 to 2,000,000 typical gatesn Pin-compatible commercial devicesfor easy and inexpensive prototypingn Ceramic packages from 2,000 to2,000,000 typical gates available incommercial temperature throughQML Class Q (MIL-STD-883 Class BEquivalent)MIL-STD-883 Class B /QML Class Q / DSCC SMDCeramic DevicesMilitary TemperatureTested Plastic DevicesOn-ChipPerformanceHermeticPackagesPlasticPackagesAxcelerator–250,000 to 2,000,000 gatesAX250, AX500AX1000 , AX2000to 350 MHzCQ208CQ256CQ352CG/LG 624FG256, FG484,FG484, FG676BG729, FG896FG1152, PQ208ProASIC PLUS 300,000 to 1,000,000 gates 300,000 to 1,000,000 gatesAPA300, APA600APA1000to 150 MHzCQ208CQ352CG/LG 624FG144, FG256BG456, PQ208SX-A 32,000 to 72,000 gates 8,000 to 72,000 gatesA54SX16A, A54SX32AA54SX72Ato 250 MHzCQ84CQ208CQ256FG144, FG256FG484, PQ208TQ100, TQ144TQ176, VQ100BG329SX 16,000 to 32,000 gates 8,000 to 32,000 gatesA54SX08, A54SX16A54SX32to 240 MHzCQ208CQ256PQ208 TQ144TQ176VQ100BG313MX 36,000 gates 2,000 to 36,000 gatesA42MX36to 125 MHzCQ208CQ256PQ208 PQ240BG27226

Fusion in System ManagementThe World’s Only Single-Chip System ManagerSystem management continues to gain importance in the design of all electronicsystems. Smaller process geometries drive more multi-volt devices and are moresusceptible to voltage and temperature fluctuations. While system managementdesigns can run into hundreds of discrete components, the Actel Fusion ProgrammableSystem Chip (PSC), the industry’s only mixed-signal field-programmablegate array (FPGA) solution, can integrate these system management functionsand provide programmable flexibility and system-level integration – all in a singlechip. Unprecedented integration in Fusion devices can offer cost and space savingsof 50% or greater relative to current implementations.Actel, the world’s only supplier of mixed-signal FPGAs, now offers the only singlechipsystem management solution. The Actel Fusion PSC integrates configurableanalog, large Flash memory blocks, comprehensive clock generation and managementcircuitry, and high performance programmable logic in a monolithic device.Actel has developed turn-keysolutions, including a development kit and a softwareGUI for system management. This level of integration, configurability, and supportestablishes Fusion as the definitive system management solution.System Management Key Tasksn Power management- Up to 10 power supplies11 V to +12 V- Power-on detection and reset- Power-up sequencing- Voltage monitoring- Current monitoringn Thermal management- Track and control up to10 remote sensorsn System clocking- Backup system clockn SRAM FPGA managementn Boot loader for MCUn Remote communicationsn Error/alarm recoveryn Diagnostics/prognosticsn Identification/authenticationn Low power operation27

Actel MicroTCASolutionsThe World’s Only Single-Chip System ManagerActel MicroTCA reference designs drastically reduce risk, component count, andtime to market. MicroTCA is a standard that reduces the cost of telecommunications,industrial, medical, and military equipment. Similar to replacement of themini-computer by the personal computer, a variety of electronic equipment can bereplaced by a modular, high availability, low cost MicroTCA chassis.Actel provides a silicon solution for MicroTCA system management. Actel supportsthe silicon solution with reference designs, semiconductor intellectual property (IP),software, and customization services that enable quicker time to market for Actelcustomers. The benefits are reduced risk, lower costs, improved performance andfunctionality, improved reliability, and higher availability.n Reduction in the number ofcomponent parts and system costn Enables more functionality in a fixedform factorn Reference designs reduce risk andtime to market at no costn Software and IP available for MMCand EMMC interfacesThe Actel MicroTCA SolutionComplexityPowerModuleAdvancedMezzanineCardCoolingUnitMicroTCACarrier HubPowerSupplyn PM – Power Modulen AMC – Advanced Mezzanine Cardn MCH – MicroTCA Carrier Hubn CM – Cooling Modulen Power SupplyFull MicroTCA28

FPGA Development SoftwareActel’s Flagship FPGA Development SoftwareActel Libero ® Integrated Design Environment (IDE)Libero Integrated Design Environment (IDE) is Actel’s comprehensive softwaretoolset for designing with all Actel FPGAs. From design, synthesis and simulation,through floorplanning, place-and-route, timing constraints and analysis, poweranalysis, and program file generation, Libero IDE manages the entire design flowquickly and efficiently. Libero’s second generation SmartDesign provides an efficientmethodology for creating complete simple and complex processor basedSystem on Chip (SoC) designs with ease.Libero IDE provides full power optimization and analysis tools for Actel’s low-powerflash FPGA families, including IGLOO nano and ProASIC3 nano,the latest additionsto the low-power family.Designer – Actel’s Design Implementation SoftwareDesigner is Actel’s powerful physical implementation software tool suite for all ActelFPGAs. After completing design entry and functional verification using Libero IntegratedDesign Environment (IDE) tools or your favorite front-end design tools, simplyimport the resulting netlist into Designer to set timing constraints and performingplace-and-route, timing analysis, power analysis, and program file generation.n SmartGenn SmartPowern SmartTimen MultiView NavigatorLibero IDEand Designer AvailabilityLibero IDE and Designer are available in Gold and Platinum editions.Please visit www.actel.com for more information on Actel products.Request your free Libero Gold Software at www.actel.comDesigner Third-Party Compatible ToolsVendorAldecCadence Design SystemsHDL WorksMentor GraphicsProductActive-HDL , RivieraNC-Sim/verilog/VHDL; ConFormal, OrCAD ® CaptureHDL CompanionLeonardoSpectrum , Precision RTL/Plus, ModelSim, Formal Pro,IO DesignerSimuCAD SILOS -XSynaptiCADSynopsys ®SynplicityWaveFormer Pro , Testbencher, VeriLogger ExtremeDesign Compiler ® , PrimeTime ® , VCS ® , VSSSynplify, Identify,29

IP SolutionsEnabling System-Level IntegrationWith more than 160 intellectual property (IP) products designed and optimizedto work with Actel devices, Actel DirectCores and CompanionCores support thecommunications, consumer, military, industrial, automotive, and aerospace markets.Actel IP Solutions streamline your designs, enable faster time to market, andminimize design costs and risks. Actel IP cores are compatible with the Libero®IntegratedDesign Environment (IDE) suite of development tools.Many are delivered with solutions that simplify integration.Please visit us atwww.actel.com/products/ip/default.aspx for a complete listing ofActel’s IP products. Some of the mostpopular products are listed in thefollowing table.Part NumberDescriptionPart NumberDescriptionCore10/100Core1553BRTCore1553BBCCore1553BEval BoardCore1553BRMCore1553BRM-DEV-KITCore1553BRT-EBRCore3DESCore429Core429-DEV-KIT10/100 Mbps Ethernet MAC with host controllerMIL-STD-1553B remote terminal (RT)MIL-STD-1553B bus controller (BC)PCI Card implementingMIL-STD-1553B BC or RT bus interfaceMIL-STD-1553B combined RT, BC, andmonitor terminal (MT)BC and RT/MT blocks on an APA600-FG676 deviceSAE AS5682 enhanced bit rate RT3DES encryption and decryptionARINC 429 bus interfacePCB implements Core429 and Core8051as an ARINC 429 interfaceCoreMP7-E600-DEV-KITCoreABCCortex-M1CoreAICorePWMCoreSDRCoreDDRCoreSPICoreUARTCoreI2CCoreMP7 development kit withM7A3PE600-FG484 deviceSmallest soft micro available in an FPGAARM high-performance FPGA-optimized32-bit processorAnalog interface between microprocessorand Fusion Analog System blockPulse width modulation functionSingle-data-rate DRAM controller forstandard SDRAMDouble-data-rate SDRAM controllerSerial peripheral interfaceUniversal asynchronous receiver/transmitter with FIFO supportI2C master/slave interfaceCore8051PF8051-DEV-KIT8-bit microprocessor—100% ASM51 compatibleCore8051 and Core10/100 in a web serverapplicationCANLINController Area Network bus controller(CAN 2.0B)Local interconnect network bus controllerCoreAES128AES encryption and decryptionHDLCHigh-level data link controller (HDLC)CoreFIRFinite impulse response filter generatorJPEG2K_EJPEG 2000 encoder coreCoreFFTFast Fourier transform processorMC-ACT-DVBMODDigital video broadcast (DVB) modulatorCoreCORDICCoordinate rotational digital computerM-JPEG Dec/EncM-JPEG decoder/encoderCoreDDSCoreFMEECorePCIFDirect Digital SynthesizerFlash memory endurance extenderPCI specification 2.3 bus controllerwith FIFORS Enc/DecLEON3SpacewireReed-Solomon encoder and decoder(configurable)32-bit SPARC V8 processorSpacewire codec with RMAP supportPFAX-DEV-KITPCI card implementing PCI 2.3 target +DMA in an AX1000-FG676 deviceGRFPUIEEE 754–compliant floating-point unitCoreMP7ARM7TDMI-S soft coreMSC is offering Actel workshopsand seminars (i. e. VHDL, PCI, USB,CortexM1...) please visit us atwww.msc-ge.com.30

Green PackagingThe Actel Commitment to the EnvironmentThe use of lead and other harmful compounds in commercial and consumer electronicdevices is a growing environmental problem. As political pressure over healthissues has come to bear, the electronics industry has enacted sweeping initiativesto reduce lead in its products. There are many challenges associated with this transition,and Actel has dedicated some of its most experienced resources to developinglead-free solutions.The Actel drive toward “green” electronics products is motivated by a desire to bea good corporate and global citizen, and is also a response to legislative mandatesbanning lead and other materials in electronics manufacturing. Regulations anddirectives from many countries and states are forcing implementation of environment-friendlymanufacturing and products.TemperatureT LT SMAXT SMIN25°Ramp-upT SRamp-downPreheatt 25° to PeakTimeFigure 1: Solder Reflow Profile for Lead (Pb)-Free PackagesCritical Zonet L to t PAs part of its environmental initiative, Actel is working withits suppliers and customers within the guidelines establishedby several industry consortia to develop lead-freemanufacturing standards and processes. Currently, Actelis actively taking a leadership position in addressing theneeds of lead-free processing in the electronics industry.Actel defines its green packaging as being free of lead,halogenated compounds, and antimony oxides. Thesedevices offer all of the same benefits and features found inthe company’s standard packaging options, such as highsecurity, low power consumption, and firm error immunity.For more details please visit our websitewww.msc-ge.comMSC High-Tech Programming ServicesSave valuable time and money – Just use our Know-How and our systemsfor programming your componentsComponent programming is becoming more and more complex.At the same time, package types are smaller and more difficult tohandle with an increased risk of damage to pins. Keeping pace withdevelopments requires continous investment in equipment to matchthe new products and packages: buying new sockets, acquiringnew algorithms and, often, completely replacing the programmer.Specialist skilled staff require training and retraining.Profit from our expertise and use our capacitiesfor your advantage.Audited byProgrammingMarkingTapingBaking &Dry-Packingn No capital investmentn Just fixed and predictable costs per devicen Logistic conceptsn Fully automated processesn Shortest delivery timesn Complete trackingn Achieved certification to DIN EN ISO 9001:2000www.msc-ge.com/frame/en/2067-www31

In-System ProgrammingSecure On-the-Fly ReprogrammabilityAn extremely important consideration is the extent to which the FPGA program can be configured safely in situ – with in-systemprogramming (ISP) that enables system designers and their customers to continue adding features and benefits to the systemthroughout its working life. Actel Fusion, IGLOO/e, and ProASIC3/E devices provide a complete solution for intellectual propertyand programming security that includes the following:A Secure Foundation because flash FPGAs are nonvolatile, live at power-up, andsinglechip, providing nonvolatile memory on-chip.FlashLock allows the designer to control the security levels of the array andFlashROM independently, including programming, verification, and encryption.Advanced Encryption (AES) is provided for the secure transmission of programmingfiles through the public domain.Message Authentication Control (MAC) is used in secure programming to verify thatprogramming information is not altered during transmission. The entire file can beauthenticated against device security settings before programming is initiated so thedevice retains its original information if the programming file is not valid.Nonvolatile Memory – FlashROM and Flash Memory Blocks (Fusion) the FPGAprovide storage for keys and identifiers to control the secure ISP and serializationprocesses, as well as sufficient space for user-defined data and applications.The above combination constitutes an in-system programming solution that issecure and provides key benefits to system designers and their customers. Thesepowerful features ensure that users of Actel Fusion, IGLOO/e, and ProASIC3/Edevices can protect their systems from harm in the form of overbuilding, device IP/design theft, product tampering, and other malicious activities.Live at Power-UpThe Time It Takes an FPGA to Power Up Has a Significant Impacton Effective System Design and Total System CostProgrammable logic devices based on nonvolatile memory technologies, such asActel flash and antifuse FPGAs, store their configuration in the logic gates. Thiseliminates the need to download the configuration, making these devices readilyavailable for operation in a similar way to standard semiconductor devices (ASICs/ASSPs). Other technologies, such as volatile SRAM-based programmable logicdevices, wake up in an unknown state and require the download of configurationfrom an external nonvolatile memory device during each power-up cycle. HybridSRAM devices have SRAM FPGA architecture and nonvolatile configuration memoryon-chip. These FPGAs must be loaded internally on each power-up cycle. Onlyafter the device is loaded with the configuration can it start operating according tothe customer application. After each power-down or brownout, the device loses itsconfiguration and needs to be loaded again in the next power-up cycle.Actel nonvolatile Level 0 live-at-power-up (LAPU) FPGAs speed initialization of systemcomponents and execute critical tasks up to 4,000 times sooner than SRAM or HybridFPGAs, and before the processor powers up and initializes. Critical tasks include setupand configuration of memory blocks, clock generation, synthesis and distribution, andbus activity management. The live-at-power-up capability of Actel nonvolatile devicesgreatly simplifies total system design and reduces total system cost. Using live-at-powerupActel FPGAs instead of SRAM or Hybrid FPGAs often eliminates the need for complexprogrammable logic devices (CPLDs), clock generation devices, and external PLLs.32

JTAG/Boundary Scan TestAffordable & Scriptable®Hpe ACT-Scanaffordable & scriptablen Cost efficient JTAG-ToolFor interactive board level debugging and production testsn IO-FilteringObserve IOs of interest onlyn Pin-File parsingUse your HDL top-level pin names to find signals quicklyn Scripting interfaceFor production tests and all repetitive tasksn Free with every Hpe ® _midi systemEvery Hpe ® _midi system comes with powerful andfree software tools, including Hpe ® _JTAGHave you ever attempted to measure signals between twoball grid arrays and then noticed that you forgot to insert testpads? Has the price of JTAG tools kept you from usingBoundary Scan Tests?With Hpe ® _JTAG Gleichmann Electronics Research introducesa cost efficient JTAG tool allowing you to debug and testyour PCBs and ICs. Hpe ® _JTAG gives the design engineer fullcontrol over the logical states of any I/O-pin or register thatis accessible via Boundary Scan at a fraction of the cost ofhigh-end JTAG tools. Opposed to most low-cost JTAG tools,Hpe ® _JTAG is fully scriptable, hence tests can be automatedfor production.IO-FilteringObserve IOs of interest only&Pin-File parsingUse your HDL top-level pinnames to find signals quicklyHpe ® _ACT-Scan will only allow Actel devices in theJTAG-chain. If a non-Actel device is in the JTAG-chain theuser has to upgrade to the Hpe ® _JTAG.Short description:Hpe ® _ACT-Scan is a tool for interactive PCB debugging.Hpe ® _ACT-Scan allows users to load pin names BSDL filesand/or from pin files generated during FPGA synthesis(*.rpt files).A powerful Python scripting interface allows users to automaterepetitive tasks and/or add functionality to the tool(for example to read out A/D register values for Actel FusionFPGAs).Demo version (Hpe ® _ACT-Scan Demo):Requires a license file that will be generated free of chargefor MSC customers only. The demo version will include:n A simulator (no real hardware required)n Support for Actel IGLOO AGL125V5Visit www.msc-toolguide.comto download your free demo software orfor ordering the Hpe ® _ACT-Scan Tool-SetRequest your demo license at act-licensing@msc-ge.comFor more information about the unrestrictedHpe ® _JTAG-Tool-Set please contact:Gleichmann Electronics Research (Austria)GmbH & Co KGSoftwarepark IT Center · Top 2/4AT - 4232 HagenbergTel. +43 7236 3351 4500sales@ge-research.comwww.ge-research.com33

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