Avionic-X: A demonstrator for the Next Generation Launcher Avionics

in a rack-based architecture (following the IMA trend) anduse of Time and Space Partitioning; second, a hotredundancy concept, and a communication based on a timetriggeredprotocol (see § III.C.1)).1) Toward a more integrated architecture (IMA)A “centralized” architecture is an architecture where themain tasks are executed on the same processing unit. In a“distributed” architecture, the tasks are distributed throughseveral equipments.The current Ariane 5 avionic architecture is mainlycentralized, as there is an On-Board Computer (OBC)centralizing all the sensor data to compute the GNC and thesequential algorithms for commanding the launcher.However it is also partially distributed as other equipmentsalso have “intelligent” functions to perform, before or afterthe OBC computations. The architecture is organized on a“master-slave” mode, meaning that the centralized OBCtakes all the decisions, based on the sensor inputs andmeasurements. This was a way to ensure the determinismrequired for a high level of reliability and availability.The choice of Ariane 5 was the result of a top-downallocation of the main avionics functions to differentequipments, with clear industrial perimeters andresponsibilities, accepting the fact that each industrial wouldprobably have to develop or to implement computing meansin an heterogeneous way and without any harmonization.In general this was not a problem as most of theequipments only needed very simple functions, easy toimplement within simple components such as DSP, ASIC orFPGA. But for complex equipments like the SRI (InertialMeasurement Unit), the computing unit could have beenharmonized or merged with the OBC itself.Today, the evolution of CPU capacity allows us toenvision a stronger centralization (or integration) of thearchitecture, for example by merging the SRI and OBCnumerical calculations on the same computing node, in orderto reduce the number of equipments and the associatedweight.We reach here the concept of Integrated ModularAvionics, which comes from Aircraft development. Themain idea is to reduce the amount of embedded avionichardware by sharing the same hardware and softwareresources between various sub-systems. In this concept, astandardized CPU modules would allow to reuse the samemodule for all the launchers functions requiring computingcapabilities.This standard Processing Module would be physicallyregrouped with other standardized or specific modules inracks, as it has been done in the satellite industry (forexample the Spacebus 4000 avionics concept described in[5]). Within Avionic-X we call this standard ProcessingModule “MDHB-X”, which stands for “Modular DataHandling Block” and is presented in § C.2).Modular Data Handling Block(MDHB-X)Power BoardEMPTYInertial BoardGNSS BoardFigure 4. Example of a rack-based architecture2) Redundancy conceptThe current Ariane 5 system is based on a duplexarchitecture composed of two onboard computers in hotredundancy. The nominal one is in charge of all operationson both avionics chains and the redundant one only spies asubset of the 1553 messages to maintain its own flightcontext. In case of auto-detected errors on the nominal OBC,an error signal is sent and a hand-over is done to theredundant OBC which takes the control of the 1553 busesand continues the mission. The redundant OBC becomes“the last survivor” and the nominal OBC cannot recover theflight control.The first redundancy concept which we aim at testing onAvionic-X is not dissimilar to Ariane 5’s one, but improvesthe transition phase and simplifies the design of the flightsoftware. As a matter of fact, in this concept both OBCsexecute the same software in parallel, and the selection of thecommand which shall be executed is performed by theactuator. The failure of one OBC is then almost transparent,hence a true “hot redundancy”. The reinsertion of the faultyOBC could also be envisioned, in case of a transient failurefollowed by a reset and successful auto-tests.This concept of “selection by the actuator” couldeventually be scalable to a triplex concept, for specificmissions where the exposition to natural radiativeenvironment could otherwise lead to unacceptableunreliability figures.C. Technological enablersThe second activity branch of the project aims atidentifying innovative technological candidates (hardware,software, methods), performing trade-offs and feasibilitystudies w.r.t. a launcher system, and elaborating roadmaps tomature the relevant technological enablers up to TRL 6.The technologies we are looking at in the frame of theAvionic-X shall cover the biggest part of a launcher avionics