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74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state

74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state

74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state

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NXP Semiconductors<strong>74AHC573</strong>; <strong>74AHCT573</strong><strong>Octal</strong> D-<strong>type</strong> <strong>transparant</strong> <strong>latch</strong>; 3-<strong>state</strong>10. Dynamic characteristicsTable 7. Dynamic characteristicsVoltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C UnitMin Typ [1] Max Min Max Min Max<strong>74AHC573</strong>t pd propagation Dn to Qn; see Figure 6[2]delayV CC = 3.0 V to 3.6 VC L = 15 pF - 5.5 11.0 1.0 13.0 1.0 14.0 nsC L = 50 pF - 7.8 14.5 1.0 16.5 1.0 18.5 nsV CC = 4.5 V to 5.5 VC L = 15 pF - 3.9 6.8 1.0 8.0 1.0 8.5 nsC L = 50 pF - 5.5 8.8 1.0 10.0 1.0 11.0 nsLE to Qn; see Figure 7 [2]V CC = 3.0 V to 3.6 VC L = 15 pF - 5.8 11.9 1.0 14.0 1.0 15.0 nsC L = 50 pF - 8.3 15.4 1.0 17.5 1.0 19.5 nsV CC = 4.5 V to 5.5 VC L = 15 pF - 4.2 7.7 1.0 9.0 1.0 10.0 nsC L = 50 pF - 5.9 9.7 1.0 11.0 1.0 12.5 nst en enable time OE to Qn; see Figure 8[3]V CC = 3.0 V to 3.6 VC L = 15 pF - 5.8 11.5 1.0 13.5 1.0 14.5 nsC L = 50 pF - 8.3 15.0 1.0 17.0 1.0 19.0 nsV CC = 4.5 V to 5.5 VC L = 15 pF - 4.4 7.7 1.0 9.0 1.0 10.0 nsC L = 50 pF - 6.3 9.7 1.0 11.0 1.0 12.5 nst dis disable time OE to Qn; see Figure 8[4]V CC = 3.0 V to 3.6 VC L = 15 pF - 6.8 11.0 1.0 13.0 1.0 14.0 nsC L = 50 pF - 9.7 14.5 1.0 16.5 1.0 18.5 nsV CC = 4.5 V to 5.5 VC L = 15 pF - 4.6 7.7 1.0 9.0 1.0 10.0 nsC L = 50 pF - 7.4 9.7 1.0 11.0 1.0 12.5 nst W pulse width LE HIGH; see Figure 7V CC = 3.0 V to 3.6 V 5.0 - - 5.0 - 5.0 - nsV CC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - nst su set-up time Dn to LE; see Figure 9V CC = 3.0 V to 3.6 V 3.5 - - 3.5 - 3.5 - nsV CC = 4.5 V to 5.5 V 3.5 - - 3.5 - 3.5 - ns74AHC_AHCT573_3© NXP B.V. 2008. All rights reserved.Product data sheet Rev. 03 — 24 April 2008 8 of 17

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