pcp_reference_guide_v2.5 - Tasking

Linker Script Language8−5The memory and bus definitions (optional)Memory and bus definition are used within the context of a derivativedefinition to specify internal memory and on−chip buses. In the context ofa board specification the memory and bus definitions are used to defineexternal (off−chip) memory and buses. Given the above definitions thelinker can convert a logical address into an offset into an on−chip oroff−chip memory device.See section 8.7.3, Defining External Memory and Buses, for moreinformation on how to specify the external physical memory layout.Internal memory for a processor should be defined in the derivativedefinition for that processor.The board specificationThe processor definition and memory and bus definitions together form aboard specification. LSL provides language constructs to easily describesingle−core and heterogeneous or homogeneous multi−core systems. Theboard specification describes all characteristics of your target board’ssystem buses, memory devices, I/O sub−systems, and cores that are ofinterest to the linker. Based on the information provided in the boardspecification the linker can for each core:• convert a logical address to an offset within a memory device• locate sections in physical memory• maintain an overall view of the used and free physical memory withinthe whole system while locatingThe section layout definition (optional)The optional section layout definition enables you to exactly controlwhere input sections are located. Features are provided such as: theability to place sections at a given load−address or run−time address, toplace sections in a given order, and to overlay code and/or data sections.Which object files (sections) constitute the task that will run on a givencore is specified on the command line when you invoke the linker. Thelinker will link and locate all sections of all tasks simultaneously. From thesection layout definition the linker can deduce where a given section maybe located in memory, form the board specification the linker can deducewhich physical memory is (still) available while locating the section.See section 8.8, Semantics of the Section Layout Definition,, for moreinformation on how to locate a section at a specific place in memory.• • • • • • • •