EXPLOITING EMBEDDED SYSTEMS THE SEQUEL!

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The JTAG Interface• 5 pin serial interface embedded on chipTDI (Test Data In)TDO (Test Data Out)TCK (Test Clock)TMS (Test Mode Select)TRST (Test Reset) - optionalAllows full debugging of the processor core:• Read/write memory• Read/write registers• Trace and single step• BreakpointsCopyright © 2007 Juniper Networks, Inc. Proprietary and Confidential www.juniper.net 8
The JTAG Interface – ARM/XSCALE• ARM supports both a 14 and 20 pin JTAG header• Headers may be on-board the circuit• If no header on-board, interface must be custom builtCopyright © 2007 Juniper Networks, Inc. Proprietary and Confidential www.juniper.net 9
Page 1 and 2: EXPLOITING EMBEDDEDSYSTEMSTHE SEQUE
Page 3 and 4: Embedded Architectures• MIPS and
Page 5 and 6: The ARM Architecture• RISC based
Page 7: The BDI2000JTAG Support for:• MIP
Page 11 and 12: The Serial Interface• Support for
Page 13 and 14: Locating the JTAG pointsTypical sce
Page 15 and 16: Connecting the BDI2000Copyright ©
Page 17 and 18: Defeating the Watchdog• Software
Page 19 and 20: Debugging and Reversing• Flash on
Page 21 and 22: Debugging and Reversing• Decrypte
Page 23 and 24: New Attack Classes• Exploitable N
Page 25 and 26: New Attack Classes - Vector Rewrite
Page 27 and 28: New Attack Classes - Prevention•
Page 29 and 30: System-On-Chip Designs• Many chip
Page 31 and 32: Exploitation (ARM)• The ARM proce
Page 33 and 34: ExploitationTwo Step Exploitation1
Page 35 and 36: Exploitation (ARM)Set remote config
Page 37 and 38: Exploitation• Successful exploit
Page 39 and 40: Firmware PatchConsiderations:• Ne
Page 41 and 42: Injector 2.0• Watch for downloads
Page 43 and 44: Exploit DemonstrationDEMO!Copyright
Page 45 and 46: Summary• Security flaws are abund

EXPLOITING EMBEDDED SYSTEMS THE SEQUEL!

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