WEARABLE/IMPLANTABLE

EVENING EVENTS Monday February 1 st , 8:00 PM
EE1: Class of 2025 – Where Will Be the Best Jobs?
Organizers:
Moderator:
Xicheng Jiang, Broadcom, Irvine, CA
Axel Thomsen, Cirrus Logic, Austin, TX
Piero Malcovati, University of Pavia, Pavia, Italy
M.C. Frank Chang, National Chiao Tung University, Hsinchu, Taiwan
Digital circuits have been driving the development of IC technologies for decades and they
cover by far the widest share of the IC market. Analog and RF circuits, on the other hand, are
essential for implementing crucial functions in electronic systems and require highly qualified
and skilled designers. As a result, a widespread opinion is that there will always be request
for competent analog and RF engineers, however, others argue that digital electronics is taking
over and there will be little need for other disciplines. Indeed, for the past several decades,
the camps of analog and digital engineers have been debating the year in which their
opponents’ discipline will become obsolete. On top of this there is the common misconception
that analog, RF, and power electronic circuits, compared to digital and memory designs, seem
to be more of a whimsical art than a systematic science. In this context, which is the best
choice for students? Is it worth pursuing the whimsical art of analog electronics, or is it better
to focus entirely on digital systems and software? This panel will try to answer these basic
questions, exploiting the know-how of top educators and industry experts active in either the
analog or the digital field.
Panelists:
Willy Sansen, KU Leuven, Leuven, Belgium
Jan M. Rabaey, UC Berkeley, CA
Lawrence Loh, MediaTek, Taiwan
Alessandro Piovaccari, Slicon Labs, Austin, TX
David Flynn, ARM, Cambridge, United Kingdom
Tzi-Dar Chiueh, National Taiwan University, Taipei, Taiwan
EE2:
Organizers:
Moderator:
Do We Need to Downscale Our Radios
Below 20nm?
Harish Krishnaswamy, Columbia University, New York, NY
Jan Craninckx, imec, Leuven, Belgium
Tae Wook Kim, Yonsei University, Seoul, South Korea
Harish Krishnaswamy, Columbia University, New York, NY
It is well known that CMOS technology scaling benefits digital circuits and systems, but
creates numerous challenges for analog/RF circuit designers. Analog and RF operating
frequencies have ceased to noticeably improve as wiring dominates over raw transistor
performance. The shrinking supply voltage limits dynamic range while gate-leakage mismatch
dominates over conventional mismatch mechanisms. As this analog-digital divide widens
below the 20nm technology node, it becomes important to ask: Should we continue to
downscale our radios? Do analog and RF designers need to “get with the program” and figure
out how to design in radically scaled technologies? Will analog and RF circuits look
increasingly “digital”? Or, will economic forces rule all, and the high cost of scaled
technologies eventually dictate a two-chip “best node for the operating mode” solution?
Panelists:
Aaron Thean, imec, Leuven, Belgium
George Chien, Mediatek, San Jose, CA
Peter Kinget, Columbia University, New York, NY
Pietro Andreani, Lund University, Lund, Sweden
Thomas Byunghak Cho, Samsung Electronics, South Korea
Tony Montalvo, Analog Devices, Raleigh, NC
20