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EXERCÍCIO 2 (descrição completa) (2/3)<br />
EXERCÍCIO 2 (simulação) (3/3)<br />
library IEEE;<br />
use IEEE.Std_Logic_1164.all;<br />
use IEEE.Std_Logic_unsigned.all;<br />
entity exemplo is<br />
end;<br />
architecture a1 of exemplo is<br />
signal opA, opB, soma : std_logic_vector(3 downto 0);<br />
signal clock, reset, cin, cout: std_logic;<br />
begin<br />
soma
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