Indy R1000 Datasheet - Impinj

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Indy R1000 ® Electrical, Mechanical, & Thermal Specification TABLE OF CONTENTS 1 INTRODUCTION ............................................................................................................................................................................ 1 1.1 TERMINOLOGY ............................................................................................................................................................................. 1 1.2 REFERENCE DOCUMENTS ............................................................................................................................................................. 3 2 ABOUT THIS DOCUMENT ........................................................................................................................................................... 4 2.1 INDY R1000 READER CHIP DIAGRAMS ......................................................................................................................................... 4 3 PIN LISTING/SIGNAL DEFINITIONS ........................................................................................................................................ 6 4 ELECTRICAL SPECIFICATIONS ............................................................................................................................................... 8 4.1 ABSOLUTE MAXIMUM RATINGS ................................................................................................................................................... 8 4.2 OPERATING CONDITIONS .............................................................................................................................................................. 9 4.3 TRANSCEIVER FUNCTIONAL SPECIFICATIONS ............................................................................................................................... 9 5 FUNCTIONAL DESCRIPTION ................................................................................................................................................... 14 5.1 ANALOG RECEIVER DATA PATH ................................................................................................................................................. 15 5.1.1 Receiver Front-end Circuitry ............................................................................................................................................. 15 5.1.2 LO Input ............................................................................................................................................................................. 16 5.1.3 Receive RF Interface .......................................................................................................................................................... 16 5.1.4 Receive Baseband Interface ............................................................................................................................................... 16 5.2 DIGITAL RECEIVER DATA PATH ................................................................................................................................................. 17 5.2.1 Decimation Filters and AGC Control ................................................................................................................................ 17 5.2.2 Digital Channel Filter ........................................................................................................................................................ 18 5.2.3 RSSI .................................................................................................................................................................................... 18 5.3 DIGITAL TRANSMITTER DATA PATH .......................................................................................................................................... 18 5.3.1 Baseband Encoding and Pulse Shaping ............................................................................................................................. 19 5.3.2 Power Scaling .................................................................................................................................................................... 20 5.3.3 Hilbert Transformer ........................................................................................................................................................... 20 5.3.4 Frequency Shifter ............................................................................................................................................................... 20 5.3.5 AM Pre-distortion............................................................................................................................................................... 20 5.3.6 Upsampling ........................................................................................................................................................................ 20 5.3.7 Sigma Delta Digital to Analog Converter .......................................................................................................................... 20 5.4 ANTENNA CONFIGURATION SCENARIOS ..................................................................................................................................... 22 5.5 RF POWER DETECTION ............................................................................................................................................................... 23 5.6 TRANSMITTER MODES ................................................................................................................................................................ 23 5.6.1 Full Power Non-linear Mode (DSB-ASK) .......................................................................................................................... 23 5.6.2 Low Power Non-linear Mode (DSB-ASK) .......................................................................................................................... 24 5.6.3 Linear Mode ....................................................................................................................................................................... 24 6 DEVICE CONTROL AND PROGRAMMING ........................................................................................................................... 25 6.1 SERIAL INTERFACE ..................................................................................................................................................................... 26 6.1.1 Parallel Interface ............................................................................................................................................................... 28 ii Revision 2.3, Copyright © 2012, Impinj, Inc.
Indy R1000 ® Electrical, Mechanical, & Thermal Specification 6.2 REGISTER MAP ........................................................................................................................................................................... 30 7 PERFORMANCE CHARACTERISTICS - PRELIMINARY ................................................................................................... 56 7.1 RECEIVER COMPRESSION POINT ................................................................................................................................................. 56 7.2 RF TO IF CONVERSION GAIN AND GAIN FLATNESS .................................................................................................................... 57 7.3 CARRIER SETTLING TIME ........................................................................................................................................................... 57 7.4 RX SENSITIVITY TESTING ........................................................................................................................................................... 58 7.5 TRANSMIT OUTPUT SPECTRAL TESTING ..................................................................................................................................... 64 7.6 GAIN CONTROL RESOLUTION AND DYNAMIC RANGE ................................................................................................................. 68 7.7 ADC TESTING ............................................................................................................................................................................ 70 7.8 AUX. DAC TESTING ................................................................................................................................................................... 70 8 PACKAGE INFORMATION ........................................................................................................................................................ 73 8.1 PACKAGE INFORMATION ............................................................................................................................................................ 73 8.2 PACKAGE MARKINGS ................................................................................................................................................................. 76 NOTICES: ............................................................................................................................................................................................... 77 FIGURES FIGURE 1: INDY R1000 READER CHIP TOP LEVEL RF BLOCK DIAGRAM .................................................................................................... 4 FIGURE 2: INDY R1000 READER CHIP TOP LEVEL DIGITAL BLOCK DIAGRAM ........................................................................................... 4 FIGURE 3: INDY R1000 READER CHIP SAMPLE APPLICATION ..................................................................................................................... 5 FIGURE 4: ANALOG RECEIVER DATA PATH .............................................................................................................................................. 15 FIGURE 5: RECEIVER FRONT-END EXTERNAL INTERFACES ....................................................................................................................... 15 FIGURE 6: LO INPUT EXTERNAL INTERFACES ........................................................................................................................................... 16 FIGURE 7: OVERVIEW OF THE DIGITAL PART OF THE TRANSMITTER DATA PATH ..................................................................................... 19 FIGURE 8: PRINCIPLE OF SIGMA-DELTA DAC ........................................................................................................................................... 21 FIGURE 9: SINGLE ANTENNA SCENARIO ................................................................................................................................................... 22 FIGURE 10: DUAL ANTENNA SCENARIO .................................................................................................................................................... 22 FIGURE 11: INDY R1000 READER CHIP TRANSMIT WITH EXTERNAL PA (DSB ASK OR PR-ASK) .......................................................... 24 FIGURE 12: SERIAL INTERFACE FRAME FORMAT ...................................................................................................................................... 26 FIGURE 13: SERIAL INTERFACE T2R TIMING ............................................................................................................................................ 26 FIGURE 14: SERIAL INTERFACE R2T TIMING ............................................................................................................................................ 27 FIGURE 15: PARALLEL INTERFACE READ TIMING ..................................................................................................................................... 28 FIGURE 16: PARALLEL INTERFACE WRITE TIMING ................................................................................................................................... 28 FIGURE 17: CARRIER SETTLING TIME ....................................................................................................................................................... 57 FIGURE 18: PACKET ERROR RATE TEST SETUP - MONOSTATIC CONFIGURATION ..................................................................................... 58 FIGURE 19: PACKET ERROR RATE TEST SETUP - BI-STATIC CONFIGURATION .......................................................................................... 59 FIGURE 20: PACKET ERROR RATE TEST SETUP - REAL TAG ..................................................................................................................... 59 FIGURE 21: RX SENSITIVITY PLOT: FM0, 40 KBPS, NO SELF JAMMER ..................................................................................................... 60 FIGURE 22: RX SENSITIVITY PLOT: FM0, 40 KBPS, MEDIUM IFLNA GAIN SETTING ............................................................................... 61 FIGURE 23: RX SENSITIVITY PLOT: FM0, 40 KBPS, +2 DBM, SELF JAMMER ............................................................................................ 62 FIGURE 24: RX SENSITIVITY PLOT: FM0, 40 KBPS, LOW RF GAIN, NO SELF JAMMER ............................................................................. 62 FIGURE 25: M4 62.5K (DENSE READER MODE) ....................................................................................................................................... 63 FIGURE 26: M4 62.5K FAR AWAY INTERFERER ........................................................................................................................................ 63 FIGURE 27: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR DSB, TARI=25 SEC, X=0.5 ..................................... 64 FIGURE 28: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR DSB, TARI=25 µSEC, X=1 ......................................... 64 FIGURE 29: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR PR-ASK, TARI=12.5 µSEC, X=0.5 ............................ 65 FIGURE 30: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR PR-ASK, TARI=12.5 µSEC, X=1 ............................... 66 FIGURE 31: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR PR-ASK, TARI=25 µSEC, X=0.5 ............................... 66 FIGURE 32: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR PR-ASK, TARO= 25 µSEC, X=1 ................................ 66 FIGURE 33: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR SSB, TARI=12.5 µSEC, X=0.5 ................................... 67 FIGURE 34: INDY R1000 READER CHIP TRANSMIT MODULATION AND MASK FOR SSB, TARI=12.5 µSEC, X=1 ...................................... 67 Revision 2.3, Copyright © 2012, Impinj, Inc. iii
Page 1: Indy Electrical, Mechanical, & Ther
Page 5 and 6: 1 Introduction Indy R1000 ® Electr
Page 7 and 8: 1.2 Reference Documents Indy R1000
Page 9 and 10: Indy R1000 ® Electrical, Mechanica
Page 11 and 12: Pin # Pin Name Type + Description I
Page 13 and 14: 4.2 Operating Conditions Indy R1000
Page 19 and 20: 5.1 Analog Receiver Data Path 5.1.1
Page 21 and 22: To increase the noise bandwidth cor
Page 27 and 28: 5.5 RF Power Detection There are th
Page 29 and 30: 6 Device Control and Programming In
Page 31 and 32: R2T_CLK R2T_FRM R2T_Dn Indy R1000
Page 35 and 36: 5:4 DP_STAT R 7:4 3:0 DP_CTRL W 7 6
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Indy R1000 ® Electrical, Mechanica
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Page 61 and 62:
7.2 RF to IF Conversion Gain and Ga
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Packet Error Rate (%) Indy R1000 ®
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Packet Error Rate Indy R1000 ® Ele
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Relative Power [dB] 20.00 0.00 -20.
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Tx output power in dBm 20 15 10 5 -
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voltage 1.5 1 0.5 -0.5 -1 -1.5 -2 -
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8 Package Information 8.1 Package I
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Notices: Copyright © 2012, Impinj,
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