Indy R1000 Datasheet - Impinj
Indy R1000 Datasheet - Impinj
Indy R1000 Datasheet - Impinj
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<strong>Indy</strong> <strong>R1000</strong> ® Electrical, Mechanical, & Thermal Specification<br />
Addr. Name R/W Bit Description Reset Type Comment<br />
203 RX_TO R/W 15:0 Receiver time-out h0000 The time after the preamble<br />
search starts when the receiver<br />
will time-out. Specified in 3 MHz<br />
clock periods.<br />
204 MO_RX_START R 1<br />
0<br />
W 1<br />
0<br />
Enable manual override<br />
Value of rx_start from FSM<br />
Enable manual override<br />
Override value for rx_start<br />
40 Revision 2.3, Copyright © 2012, <strong>Impinj</strong>, Inc.<br />
h0000<br />
h0000<br />
For starting the digital part of the<br />
receiver manually.<br />
206 IFLNA_TH_CNT R/W 15:0 IF LNA too high threshold h0000 IF LNA too high count. This<br />
determines how many 3 MHz<br />
clock cycles the too high signal<br />
from the peak detector needs to<br />
be asserted before asserting<br />
if_lna_too_high.<br />
207 IFLNA_TL_CNT R/W 15:0 IF LNA too low threshold h0000 This determines how many 3 MHz<br />
clock cycles the too low signal<br />
from the peak detector needs to<br />
be asserted before asserting<br />
if_lna_too_low.<br />
208 IFLNA_RESET_CNT R/W 15:0 IF LNA peak detector reset<br />
interval<br />
209 ADC_OD_THRES R/W 4:0 ADC input overdrive<br />
threshold<br />
210 DEC_ENABLE R/W 1<br />
0<br />
Enable decimate by 16<br />
Enable programmable<br />
decimation<br />
h0000 The number of 3 MHz clock<br />
cycles between the reset pulses<br />
to the IF LNA peak detector.<br />
h000F<br />
h0000<br />
Bit 0 needs to be set in order for<br />
the setting in register h211 to take<br />
effect.<br />
211 DEC_MUX_SEL R/W 1:0 Decimation selection h0000 Selection of decimation order:<br />
212 MO_RX_DEC_I R 15:0 I-output of decimation<br />
chain<br />
W 15<br />
14<br />
13:0<br />
Not used<br />
Enable manual override<br />
Override value for<br />
decimation output I<br />
213 MO_RX_DEC_Q R 15:0 Q-output of decimation<br />
chain<br />
W 15<br />
14<br />
13:0<br />
Not used<br />
Enable manual override<br />
Override value for<br />
decimation output Q<br />
0 = Decimate by 16<br />
1 = Decimate by 32<br />
2 = Decimate by 64<br />
3 = Decimate by 128<br />
h0000 For reading the I-output of the<br />
decimation chain (sign extended<br />
to 16 bits).<br />
h0000<br />
For overriding the I-output of the<br />
decimation chain.<br />
h0000 For reading the Q-output of the<br />
decimation chain (sign extended<br />
to 16 bits).<br />
h0000<br />
For overriding the Q-output of the<br />
decimation chain.
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