Indy R1000 Datasheet - Impinj
Indy R1000 Datasheet - Impinj
Indy R1000 Datasheet - Impinj
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
<strong>Indy</strong> <strong>R1000</strong> ® Electrical, Mechanical, & Thermal Specification<br />
Addr. Name R/W Bit Description Reset Type Comment<br />
2A1-<br />
2AB<br />
2B1-<br />
2BB<br />
RCORR_TICKS R/W 13:0 Clock rates of rate<br />
correlators<br />
RCORR_LUT R/W 13:0 Tick compensation LUT h0000<br />
2BC RCORR_MAG R 6:0 Maximum magnitude of the<br />
rate estimation correlators<br />
2BD DRATE_CTRL R/W 8<br />
7<br />
6:2<br />
1:0<br />
2BE DRATE_THRES R/W 15:8<br />
6:0<br />
2BF DRATE_CNT_THRES R/W 15:8<br />
7:0<br />
Enable abs value in rate<br />
est restart<br />
Enable median filter in<br />
restart<br />
Peak hold counter<br />
Rate estimation coefficient<br />
select<br />
Rate estimator restart<br />
threshold<br />
Rate correction threshold<br />
Above count threshold<br />
Below count threshold<br />
h0000 Number of 48 MHz clock ticks per<br />
oversampled demodulator clock<br />
period. The value is scaled with<br />
2-4.<br />
h0000 This register has auto-read<br />
capabilities.<br />
h0000 The modes of the rate estimation<br />
is:<br />
0 = 1111 1111 0000 0000 (FM0)<br />
1 = 1111 0000 1111 0000 (M=2)<br />
2 = 1100 1100 1100 1100 (M=4<br />
and M=8)<br />
3 = 1010 1010 1010 1010 (Spare)<br />
46 Revision 2.3, Copyright © 2012, <strong>Impinj</strong>, Inc.<br />
hFF00<br />
h0000<br />
If the rate estimator restart<br />
threshold is set to hFF the restart<br />
mechanism is disabled.<br />
The number of samples above/<br />
below the threshold required to<br />
set/ reset rate est. flag.<br />
2C0 FIFO_DELAY_SEL R/W 2:0 Delay select b0000 Delay between rate estimator and<br />
the rest of the demodulator:<br />
2C1 DEMOD_DEFAULT_N<br />
UM_TICKS<br />
2C2 GAD_INT_GAIN_PRE<br />
AM<br />
R/W 13:0 Ticks per oversampled<br />
clock<br />
R/W 9:0 Proportional gain, before<br />
the preamble is found<br />
2C3 GAD_INT_GAIN R/W 9:0 Integrator gain, before the<br />
preamble is found<br />
2C4 GAD_PROP_GAIN_P<br />
REAM<br />
R/W 9:0 Proportional gain, after the<br />
preamble is found<br />
2C5 GAD_PROP_GAIN R/W 9:0 Integrator gain, after the<br />
preamble is found<br />
0 = 0 samples.<br />
1 = 32 samples.<br />
2 = 64 samples.<br />
3 = 96 samples.<br />
4 = 128 samples.<br />
5 = 160 samples.<br />
6 = 192 samples.<br />
h0000 s9.4 Number of 48 MHz clock ticks per<br />
oversampled demodulator clock<br />
period.<br />
h0000 s3.6 Proportional timing recovery gain<br />
before the preamble is found.<br />
h0000 s1.8 Integrator timing recovery gain<br />
before the preamble is found.<br />
h0000 s3.6 Proportional timing recovery gain<br />
after the preamble is found.<br />
h0000 s1.8 Integrator timing recovery gain<br />
after the preamble is found.