Indy R1000 Datasheet - Impinj
Indy R1000 Datasheet - Impinj
Indy R1000 Datasheet - Impinj
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<strong>Indy</strong> <strong>R1000</strong> ® Electrical, Mechanical, & Thermal Specification<br />
6.1 Serial Interface<br />
The serial interface has four channels: one going to the <strong>Indy</strong> <strong>R1000</strong> reader chip (R2T) and three coming from the <strong>Indy</strong> <strong>R1000</strong> reader chip (T2R).<br />
Each direction has its own clock and frame synch signals (R2T_CLK, T2R_CLK and T2R_FRM, R2T_FRM). The channels are denoted as T2R_D0<br />
and R2T_D0-2.<br />
The data is transferred in 32-bit frames delimited with the frame synchronization signal. The data is sent most significant bit (MSB) first, and the<br />
frame synchronization must occur one bit period before the MSB of the frame. When data is transferred from the <strong>Indy</strong> <strong>R1000</strong> reader chip (read<br />
request), it is placed on the lowest channel available. Up to 16 read responses can be queued in the <strong>Indy</strong> <strong>R1000</strong> reader chip. The format of the data<br />
frame is shown in Figure 12.<br />
A W Rank Address Data<br />
Figure 12: Serial Interface Frame Format<br />
The A parameter determines if this access is valid or if it is an empty frame. The W parameter is set if the frame is a write operation. For T2R, this<br />
value is always zero. If the same source is read several times, the rank parameter determines the order of the incoming frames. For R2T transfers,<br />
this value is always zero. To perform a read request, the data field must be set to zero.<br />
With the serial interface, there is an additional possibility of auto-reading certain registers. When this feature is enabled each time, the source register<br />
is clocked and the value is placed as a read request in the T2R FIFO. The timing parameters for the serial interface are shown in Figure 13 and<br />
Figure 13: Serial Interface T2R Timing<br />
, and the timing requirements for the serial interface are specified in Figure 14: Serial Interface R2T Timing<br />
Table 19.<br />
T2R_CLK<br />
T2R_FRM<br />
T2R_D0<br />
Bit 1 Bit 0 Bit 31<br />
Figure 13: Serial Interface T2R Timing<br />
26 Revision 2.3, Copyright © 2012, <strong>Impinj</strong>, Inc.<br />
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