MCP23017 - Microchip
MCP23017 - Microchip
MCP23017 - Microchip
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<strong>MCP23017</strong>/MCP23S17<br />
1.6.8 INTERRUPT FLAG REGISTER<br />
The INTF register reflects the interrupt condition on the<br />
port pins of any pin that is enabled for interrupts via the<br />
GPINTEN register. A ‘set’ bit indicates that the<br />
associated pin caused the interrupt.<br />
This register is ‘read-only’. Writes to this register will be<br />
ignored.<br />
REGISTER 1-8: INTF – INTERRUPT FLAG REGISTER (ADDR 0x07)<br />
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0<br />
INT7 INT6 INT5 INT4 INT3 INT2 INT1 INT0<br />
bit 7 bit 0<br />
Legend:<br />
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’<br />
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown<br />
bit 7-0 INT7:INT0: These bits reflect the interrupt condition on the port. Will reflect the change only if interrupts<br />
are enabled (GPINTEN) .<br />
1 = Pin caused interrupt.<br />
0 = Interrupt not pending.<br />
DS21952B-page 20 © 2007 <strong>Microchip</strong> Technology Inc.