MPC5642A - Freescale Semiconductor

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30 Freescale Semiconductor MPC5642A Microcontroller Data Sheet, Rev. 3.1 2.4 Signal summary FR_A_TX GPIO[12] Name 1 FR_A_TX_EN GPIO[13] FR_A_RX GPIO[14] FR_B_TX GPIO[15] FR_B_TX_EN GPIO[16] FR_B_RX GPIO[17] Function 2 FlexRay transmit data channel A GPIO FlexRay ch. A tx data enable GPIO FlexRay receive data ch. A GPIO FlexRay transmit data ch. B GPIO FlexRay tx data enable for ch. B GPIO FlexRay receive data channel B GPIO Table 3. MPC5642A signal properties P / A / G 3 A1 G A1 G A1 G A1 G A1 G A1 G PCR PA field 4 PCR5 I/O type 010 000 010 000 010 000 010 000 010 000 010 000 GPIO 12 O I/O 13 O I/O 14 I I/O 15 O I/O 16 O I/O 17 I I/O GPIO[206] ETRIG0 GPIO / eQADC Trigger Input G 00 206 I/O 9 Voltage 6 / Pad type 7 VDDE-EH / Medium VDDE-EH / Medium VDDE-EH / Medium VDDE-EH / Medium VDDE-EH / Medium VDDE-EH / Medium VDDEH7 / Slow 10 GPIO[207] ETRIG1 GPIO / eQADC Trigger Input G 00 207 I/O 9 VDDEH7 / Slow GPIO[219] GPIO G 000 219 11 I/O VDDEH7 / MultV Reset / Configuration RESET External Reset Input P — — I VDDEH6 / Slow RSTOUT External Reset Output P 01 230 O VDDEH6 / Slow PLLREF IRQ[4] ETRIG2 GPIO[208] PLLCFG1 12 IRQ[5] DSPI_D_SOUT GPIO[209] RSTCFG GPIO[210] FMPLL Mode Selection External Interrupt Request eQADC Trigger Input GPIO — External interrupt request DSPI D data output GPIO RSTCFG GPIO P A1 A2 G — A1 A2 G P G 001 010 100 000 — 010 100 000 01 00 208 I I I I/O 209 — I O I/O 210 I I/O VDDEH6 / Slow VDDEH6 / Medium VDDEH6 / Slow Status 8 Package pin No. During reset After reset 176 208 324 — / Up — / Up — — P3 — / Up — / Up — — P4 — / Up — / Up — — R1 — / Up — / Up — — R2 — / Up — / Up — — R4 — / Up — / Up — — T1 — / Up — / Up 143 R4 C14 — / Up — / Up 144 P5 B14 — / Up — / Up 122 T6 — RESET / Up RESET / Up 97 L16 R22 RSTOUT / Down RSTOUT / Down 102 K15 P21 — / Up PLLREF / Up 83 M14 V21 — / Up — / Up — — U20 — / Down — — — P22 Pinout and signal description
Freescale Semiconductor 31 MPC5642A Microcontroller Data Sheet, Rev. 3.1 Name 1 BOOTCFG[0] IRQ[2] GPIO[211] BOOTCFG[1] IRQ[3] ETRIG3 GPIO[212] WKPCFG NMI DSPI_B_SOUT GPIO[213] Boot Config. Input External Interrupt Request GPIO Boot Config. Input External Interrupt Request eQADC Trigger Input GPIO Weak Pull Config. Input Non-Maskable Interrupt DSPI B data output GPIO P A1 G P A1 A2 G P A1 A2 G 01 10 00 001 010 100 000 001 010 100 000 211 I I I/O 212 I I I I/O 213 I I O I/O Calibration Bus VDDEH6 / Slow VDDEH6 / Slow VDDEH6 / Medium CAL_CS0 Calibration chip select P 01 336 O VDDE12 / Fast CAL_CS2 CAL_ADDR[10] CAL_WE[2]/BE[2] CAL_CS3 CAL_ADDR[11] CAL_WE[3]/BE[3] CAL_ADDR[12] CAL_WE[2]/BE[2] CAL_ADDR[13] CAL_WE[3]/BE[3] CAL_ADDR[14] CAL_DATA[31] CAL_ADDR[15] CAL_ALE CAL_ADDR[16] CAL_DATA[16] CAL_ADDR[17] CAL_DATA[17] CAL_ADDR[18] CAL_DATA[18] CAL_ADDR[19] CAL_DATA[19] CAL_ADDR[20] CAL_DATA[20] CAL_ADDR[21] CAL_DATA[21] Function 2 Calibration chip select Calibration address bus Calibration write/byte enable Calibration chip select Calibration address bus Calibration write/byte enable Calibration address bus Calibration write/byte enable Calibration address bus Calibration write/byte enable Calibration address bus Calibration data bus Calibration address bus Calibration address latch enable Calibration address bus Calibration data bus Calibration address bus Calibration data bus Calibration address bus Calibration data bus Calibration address bus Calibration data bus Calibration address bus Calibration data bus Calibration address bus Calibration data bus Table 3. MPC5642A signal properties (continued) P / A / G 3 P A1 A2 P A1 A2 P A1 P A1 P A1 P A1 P A1 P A1 P A1 P A1 P A1 P A1 PCR PA field 4 PCR5 I/O type 001 010 100 001 010 100 01 10 01 10 01 10 01 10 01 10 01 10 01 10 01 10 01 10 01 10 338 O I/O O 339 O I/O O 340 I/O O 340 I/O O 340 I/O I/O 340 I/O O 345 I/O I/O 345 I/O I/O 345 I/O I/O 345 I/O I/O 345 I/O I/O 345 I/O I/O Voltage 6 / Pad type 7 VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast VDDE12 / Fast Status 8 Package pin No. During reset After reset 176 208 324 — / Down BOOTCFG[0] / Down — / Down BOOTCFG[1] / Down — — T20 85 M15 U21 — / Up WKPCFG / Up 86 L15 AA20 — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — — / — — — — Pinout and signal description
Page 1 and 2: Freescale Semiconductor Data Sheet:
Page 3 and 4: 1 Introduction 1.1 Document overvie
Page 5 and 6: CRC Yes FMPLL Yes VRC Yes Supplies
Page 7 and 8: Table 2. MPC5642A series block summ
Page 9 and 10: 1.5 Feature details 1.5.1 e200z4 co
Page 11 and 12: 1.5.4 Interrupt controller (INTC) M
Page 13 and 14: — Glitch detection on reset input
Page 15 and 16: • 3 channels’ internal timebase
Page 17 and 18: 1.5.14 Enhanced queued analog-to-di
Page 19 and 20: 1.5.16 Enhanced serial communicatio
Page 21 and 22: MPC5642A Microcontroller Data Sheet
Page 23 and 24: 1.5.26 Nexus port controller (NPC)
Page 25 and 26: Freescale Semiconductor 25 MPC5642A
Page 29: MPC5642A Microcontroller Data Sheet
Page 49 and 50: 2.5 Signal details Table 4. Pad typ
Page 51 and 52: RCH0_[A:C] RCH1_[A:C] RCH2_[A:C] RC
Page 53 and 54: GPIO[12:17] GPIO[75:110] GPIO[113:1
Page 55 and 56: 3 Electrical characteristics MPC564
Page 63 and 64: ID Name C Parameter Table 15. PMC e
Page 65 and 66: 8 The 3.3V POR specs are also valid
Page 67 and 68: Table 19. Power sequence pin states
Page 69 and 70: I DD +I DDPLL CC P Operating curren
Page 71 and 72: R PUPD100K SR C Weak pull-up/down r
Page 73 and 74: 3.9.1 I/O pad V RC33 current specif
Page 75 and 76: T SKEW CC D Differential skew Itphl
Page 77 and 78: 3.11 Temperature sensor electrical
Page 79 and 80: Table 29. eQADC differential ended
Page 81 and 82:
Table 33. Flash EEPROM module life
Page 83 and 84:
Pad type C Medium 5,6,7 Slow 7,10 M
Page 85 and 86:
Pad Data Input Pad Output Rising Ed
Page 87 and 88:
NOTE The Nexus/JTAG Read/Write Acce
Page 89 and 90:
TCK JCOMP 9 Figure 14. JTAG JCOMP t
Page 91 and 92:
Table 38. Nexus debug port timing 1
Page 93 and 94:
N TCK TMS, TDI TDO Package Nexus Wi
Page 95 and 96:
3.17.4 Calibration bus interface ti
Page 97 and 98:
CLKOUT OUTPUT BUS OUTPUT SIGNAL OUT
Page 99 and 100:
3.17.5 External interrupt timing (I
Page 101 and 102:
Table 46. DSPI timing 1,2 (continue
Page 103 and 104:
PCSx SCK Output (CPOL = 0) SCK Outp
Page 105 and 106:
PCSx SCK Output (CPOL = 0) SCK Outp
Page 107 and 108:
3.17.9 eQADC SSI timing Table 47. e
Page 109 and 110:
4 Packages 4.1 Package mechanical d
Page 111 and 112:
Figure 36. 176 LQFP package mechani
Page 113 and 114:
Figure 38. 208 MAPBGA package mecha
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Figure 40. 324 BGA package mechanic
Page 117 and 118:
6 Document revision history Table 5
Page 119 and 120:
MPC5642A Microcontroller Data Sheet
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