MPC5642A - Freescale Semiconductor

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$Set of General Math and Motor Control Functions for ARM Cortex ...$

36 Freescale Semiconductor MPC5642A Microcontroller Data Sheet, Rev. 3.1 SCI_A_TX EMIOS13 15 GPIO[89] SCI_A_RX EMIOS15 15 GPIO[90] SCI_B_TX DSPI_D_PCS[1] GPIO[91] SCI_B_RX DSPI_D_PCS[5] GPIO[92] SCI_C_TX GPIO[244] SCI_C_RX GPIO[245] Name 1 DSPI_A_SCK 16 DSPI_C_PCS[1] GPIO[93] DSPI_A_SIN 16 DSPI_C_PCS[2] GPIO[94] DSPI_A_SOUT 16 DSPI_C_PCS[5] GPIO[95] DSPI_A_PCS[0] 16 DSPI_D_PCS[2] GPIO[96] DSPI_A_PCS[1] 16 DSPI_B_PCS[2] GPIO[97] DSPI_A_PCS[2] 16 DSPI_D_SCK GPIO[98] DSPI_A_PCS[3] 16 DSPI_D_SIN GPIO[99] DSPI_A_PCS[4] 16 DSPI_D_SOUT GPIO[100] eSCI A transmit eMIOS channel GPIO eSCI A receive eMIOS channel GPIO eSCI B transmit DSPI D peripheral chip select GPIO eSCI B receive DSPI D peripheral chip select GPIO eSCI C transmit GPIO eSCI C receive GPIO — DSPI C peripheral chip select GPIO — DSPI C peripheral chip select GPIO — DSPI C peripheral chip select GPIO — DSPI C peripheral chip select GPIO — DSPI C peripheral chip select GPIO — SPI clock pin for DSPI module GPIO — DSPI D data input GPIO — DSPI D data output GPIO Function 2 Table 3. MPC5642A signal properties (continued) P / A / G 3 P A1 G P A1 G P A1 G P A1 G P G P G — A1 G — A1 G — A1 G — A1 G — A1 G — A1 G — A1 G — A1 G PCR PA field 4 PCR5 I/O type 01 10 00 01 10 00 01 10 00 01 10 00 01 00 01 00 — 10 00 — 10 00 — 10 00 — 10 00 — 10 00 — 10 00 — 10 00 — 10 00 89 O O I/O 90 I O I/O 91 O O I/O 92 I O I/O 244 O I/O 245 I I/O DSPI 93 — O I/O 94 — O I/O 95 — O I/O 96 — O I/O 97 — O I/O 98 — I/O I/O 99 — I I/O 100 — O I/O Voltage 6 / Pad type 7 VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH7 / Medium VDDEH7 / Medium VDDEH7 / Medium VDDEH7 / Medium VDDEH7 / Medium VDDEH7 / Medium VDDEH7 / Medium VDDEH7 / Medium Status 8 Package pin No. During reset After reset 176 208 324 — / Up — / Up 100 J14 N20 — / Up — / Up 99 K14 P20 — / Up — / Up 87 L13 AB21 — / Up — / Up 84 M13 AB20 — / Up — / Up — — W19 — / Up — / Up — — V19 — / Up — / Up — — C17 — / Up — / Up — — B17 — / Up — / Up — — A17 — / Up — / Up — — D16 — / Up — / Up — — C16 — / Up — / Up 141 J15 C15 — / Up — / Up 142 H13 B15 — / Up — / Up — — B16 Pinout and signal description
Freescale Semiconductor 37 MPC5642A Microcontroller Data Sheet, Rev. 3.1 DSPI_A_PCS[5] 16 DSPI_B_PCS[3] GPIO[101] DSPI_B_SCK DSPI_C_PCS[1] GPIO[102] DSPI_B_SIN DSPI_C_PCS[2] GPIO[103] DSPI_B_SOUT DSPI_C_PCS[5] GPIO[104] DSPI_B_PCS[0] DSPI_D_PCS[2] GPIO[105] DSPI_B_PCS[1] DSPI_D_PCS[0] GPIO[106] DSPI_B_PCS[2] DSPI_C_SOUT GPIO[107] DSPI_B_PCS[3] DSPI_C_SIN GPIO[108] DSPI_B_PCS[4] DSPI_C_SCK GPIO[109] DSPI_B_PCS[5] DSPI_C_PCS[0] GPIO[110] AN0 DAN0+ AN1 DAN0 AN2 DAN1+ Name 1 Function 2 — DSPI B peripheral chip select GPIO SPI clock pin for DSPI module DSPI B peripheral chip select GPIO DSPI B data input DSPI C peripheral chip select GPIO DSPI B data output DSPI C peripheral chip select GPIO DSPI B peripheral chip select DSPI D peripheral chip select GPIO DSPI B peripheral chip select DSPI D peripheral chip select GPIO DSPI B peripheral chip select DSPI C data output GPIO DSPI B peripheral chip select DSPI C data input GPIO DSPI B peripheral chip select SPI clock pin for DSPI module GPIO DSPI B peripheral chip select DSPI C peripheral chip select GPIO Single Ended Analog Input Positive Terminal Differential Input Single Ended Analog Input Negative Terminal Differential Input Single Ended Analog Input Positive Terminal Differential Input Table 3. MPC5642A signal properties (continued) P / A / G 3 — A1 G P A1 G P A1 G P A1 G P A1 G P A1 G P A1 G P A1 G P A1 G P A1 G PCR PA field 4 PCR5 I/O type — 10 00 01 10 00 01 10 00 01 10 00 01 10 00 01 10 00 01 10 00 01 10 00 01 10 00 01 10 00 101 — O I/O 102 I/O O I/O 103 I O I/O 104 O O I/O 105 I/O O I/O 106 O I/O I/O 107 O O I/O 108 O I I/O 109 O I/O I/O 110 O I/O I/O eQADC Voltage 6 / Pad type 7 VDDEH7 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium VDDEH6 / Medium P — — I VDDA / Analog Pull-up/down P — — I VDDA / Analog Pull-up/down P — — I VDDA / Analog Pull-up/down Status 8 Package pin No. During reset After reset 176 208 324 — / Up — / Up — — A16 — / Up — / Up 106 J16 K21 — / Up — / Up 112 G15 H22 — / Up — / Up 113 G13 J19 — / Up — / Up 111 G16 J21 — / Up — / Up 109 H16 J22 — / Up — / Up 107 H15 K22 — / Up — / Up 114 G14 J20 — / Up — / Up 105 H14 K20 — / Up — / Up 104 J13 L19 I / — AN[0] / — 172 B5 C6 I / — AN[1] / — 171 A6 C7 I / — AN[2] / — 170 D6 D7 Pinout and signal description
Page 1 and 2: Freescale Semiconductor Data Sheet:
Page 3 and 4: 1 Introduction 1.1 Document overvie
Page 5 and 6: CRC Yes FMPLL Yes VRC Yes Supplies
Page 7 and 8: Table 2. MPC5642A series block summ
Page 9 and 10: 1.5 Feature details 1.5.1 e200z4 co
Page 11 and 12: 1.5.4 Interrupt controller (INTC) M
Page 13 and 14: — Glitch detection on reset input
Page 15 and 16: • 3 channels’ internal timebase
Page 17 and 18: 1.5.14 Enhanced queued analog-to-di
Page 19 and 20: 1.5.16 Enhanced serial communicatio
Page 21 and 22: MPC5642A Microcontroller Data Sheet
Page 23 and 24: 1.5.26 Nexus port controller (NPC)
Page 25 and 26: Freescale Semiconductor 25 MPC5642A
Page 35: Freescale Semiconductor 35 MPC5642A
Page 49 and 50: 2.5 Signal details Table 4. Pad typ
Page 51 and 52: RCH0_[A:C] RCH1_[A:C] RCH2_[A:C] RC
Page 53 and 54: GPIO[12:17] GPIO[75:110] GPIO[113:1
Page 55 and 56: 3 Electrical characteristics MPC564
Page 63 and 64: ID Name C Parameter Table 15. PMC e
Page 65 and 66: 8 The 3.3V POR specs are also valid
Page 67 and 68: Table 19. Power sequence pin states
Page 69 and 70: I DD +I DDPLL CC P Operating curren
Page 71 and 72: R PUPD100K SR C Weak pull-up/down r
Page 73 and 74: 3.9.1 I/O pad V RC33 current specif
Page 75 and 76: T SKEW CC D Differential skew Itphl
Page 77 and 78: 3.11 Temperature sensor electrical
Page 79 and 80: Table 29. eQADC differential ended
Page 81 and 82: Table 33. Flash EEPROM module life
Page 83 and 84: Pad type C Medium 5,6,7 Slow 7,10 M
Page 85 and 86: Pad Data Input Pad Output Rising Ed
Page 87 and 88:
NOTE The Nexus/JTAG Read/Write Acce
Page 89 and 90:
TCK JCOMP 9 Figure 14. JTAG JCOMP t
Page 91 and 92:
Table 38. Nexus debug port timing 1
Page 93 and 94:
N TCK TMS, TDI TDO Package Nexus Wi
Page 95 and 96:
3.17.4 Calibration bus interface ti
Page 97 and 98:
CLKOUT OUTPUT BUS OUTPUT SIGNAL OUT
Page 99 and 100:
3.17.5 External interrupt timing (I
Page 101 and 102:
Table 46. DSPI timing 1,2 (continue
Page 103 and 104:
PCSx SCK Output (CPOL = 0) SCK Outp
Page 105 and 106:
PCSx SCK Output (CPOL = 0) SCK Outp
Page 107 and 108:
3.17.9 eQADC SSI timing Table 47. e
Page 109 and 110:
4 Packages 4.1 Package mechanical d
Page 111 and 112:
Figure 36. 176 LQFP package mechani
Page 113 and 114:
Figure 38. 208 MAPBGA package mecha
Page 115 and 116:
Figure 40. 324 BGA package mechanic
Page 117 and 118:
6 Document revision history Table 5
Page 119 and 120:
MPC5642A Microcontroller Data Sheet
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