design and implementation of thyristor switched shunt capacitors a ...

ˆ I S is the peak value of the inrush current, (A);
U is the phase to ground voltage, (V);
X C is the series- connected capacitive reactance per phase, (Ω);
X L is the inductive reactance per phase between the capacitor banks, (Ω);
Q 1 is the output reactive power of the capacitor to be switched in, (MVAr);
Q 2 is the sum of the output reactive power of the capacitor banks which are
already energized, (MVAr).
As also can be seen from 2.9, the more inductive reactance series to the capacitors,
the less the peak of the inrush current component. Therefore each branch
includes additional series inductor in order to limit the inrush current, in other
words in order to keep the di/dt rating of the thyristor within the acceptable
limit. The resulting equivalent circuit becomes an LC circuit (Figure 2.11). It
is therefore inevitable to expect an oscillation between these storage devices.
LINE
S1 S2 S3 Sn
C1 C2 C3 Cn
Figure 2.10: The illustration of inrush current paths drawn by the stage turned
on lastly. The rest of the stages are already conducting and charged to the
supply voltage.
In the following sections, switching performance of a practical TSC will be represented
with mathematical expressions and figures. The necessary conditions
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