TSV technology for large die Cu/low K chip packaging
TSV technology for large die Cu/low K chip packaging
TSV technology for large die Cu/low K chip packaging
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Proposed Test Vehicle (Option 2)<br />
Fine pitch Test <strong>chip</strong><br />
Si interposer with <strong>TSV</strong><br />
RoHS compliant<br />
Solder interconnect<br />
BT Substrate<br />
Features:<br />
Die size:<br />
>= 2x10x12mm*<br />
Chip <strong>technology</strong>:<br />
<strong>Cu</strong>/<strong>low</strong> K* or Al Test <strong>chip</strong><br />
Bump pitch:<br />
50, 100, 150 um<br />
Micro bump type<br />
solder, <strong>Cu</strong>, Au<br />
<strong>TSV</strong> interposer bump pitch:
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