Note: Please refer to ASIX Multi-Port Ethernet Controller Application ...
Note: Please refer to ASIX Multi-Port Ethernet Controller Application ...
Note: Please refer to ASIX Multi-Port Ethernet Controller Application ...
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8<br />
7<br />
6<br />
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
P3 EECS<br />
P3 EESK<br />
P3 EEDIO<br />
P2 VCC5P<br />
P2 3.3VAUX<br />
P2 VCC33P<br />
P3 VCC33-18<br />
P3,4 VCC33<br />
P3,4 VCC33A<br />
P3 VCC18<br />
P3 VCC18A<br />
P2,3,4 GND<br />
EECS<br />
EESK<br />
EEDIO<br />
VCC5P<br />
3.3VAUX<br />
VCC33P<br />
VCC33-18<br />
VCC33<br />
VCC33A<br />
VCC18<br />
VCC18A<br />
GND<br />
Power circuit and by-pass capaci<strong>to</strong>rs<br />
3.3VAUX<br />
VCC5P<br />
VCC33<br />
C12<br />
10uF<br />
C14<br />
0.1uF<br />
C13<br />
10uF<br />
C16<br />
0.1uF<br />
C17<br />
10uF<br />
*<strong>Note</strong>5-1<br />
C18<br />
0.1uF<br />
*<strong>Note</strong>5-2<br />
J4 HEADER 3<br />
1<br />
2<br />
3<br />
VCC33P<br />
1<br />
2<br />
3<br />
4<br />
5V <strong>to</strong> 3.3V<br />
Voltage Regula<strong>to</strong>r<br />
VCC33<br />
C9<br />
U5<br />
NC<br />
VIN<br />
VOUT<br />
VAUX<br />
SI91861<br />
GND 8<br />
GND 7<br />
GND 6<br />
GND 5<br />
C34<br />
C46<br />
C48<br />
Optional<br />
VCC5P<br />
VCC33-18<br />
3.3VAUX<br />
C62<br />
NC,1uF<br />
*<strong>Note</strong>5-3<br />
C39<br />
L2<br />
C60<br />
NC,10uF<br />
PBY160808T-110Y-S<br />
100MHz/11ohm<br />
C37<br />
C61<br />
NC,0.1uF<br />
C42<br />
1<br />
2<br />
3<br />
4<br />
C59<br />
NC,10uF<br />
U6<br />
NC<br />
VIN<br />
VOUT<br />
VAUX<br />
NC,SI91861<br />
5V <strong>to</strong> 3.3V<br />
Voltage Regula<strong>to</strong>r<br />
VCC33A<br />
C41<br />
GND 8<br />
GND 7<br />
GND 6<br />
GND 5<br />
*<strong>Note</strong>5-1:<br />
All power pin should be implemented with by-pass<br />
capaci<strong>to</strong>r, and the by-pass capaci<strong>to</strong>r should be as close<br />
as the power pin. The analog powers and digital powers<br />
should be isolated with a Ferrite Bead.<br />
*<strong>Note</strong>5-2:<br />
This is the VCC33 power source selection jumper.<br />
J4 Pin #1 & #2 short: VCC33 comes from the U5 (Default)<br />
J4 Pin #2 & #3 short: VCC33 comes from the PCI 3.3V<br />
*<strong>Note</strong>5-3:<br />
The SI91861 is a 400mA Current Linear Regula<strong>to</strong>r.<br />
The 5V <strong>to</strong> 3.3V Voltage Regula<strong>to</strong>r circuit is optional<br />
for extra power supply.<br />
D<br />
C<br />
External 3.3V <strong>to</strong> 1.8V Voltage Regula<strong>to</strong>r<br />
VCC33-18<br />
VCC33<br />
R46<br />
*<strong>Note</strong>5-5<br />
NC,0,0805<br />
R45 0,0805<br />
C10<br />
0.1uF<br />
C11<br />
22uF<br />
3<br />
U3<br />
Vi<br />
RT9164A<br />
Vo<br />
ADJ<br />
3.3V <strong>to</strong> 1.8V<br />
Voltage Regula<strong>to</strong>r<br />
*<strong>Note</strong>5-4<br />
2<br />
1<br />
R12<br />
220 1%<br />
R11<br />
100 1%<br />
C8<br />
22uF<br />
22uF<br />
VCC18<br />
C47<br />
0.1uF<br />
0.1uF<br />
C45<br />
0.1uF<br />
0.1uF<br />
C49<br />
0.1uF<br />
0.1uF<br />
L3<br />
0.1uF<br />
PBY160808T-110Y-S<br />
100MHz/11ohm<br />
C44<br />
C38<br />
0.1uF<br />
10uF<br />
10uF<br />
C36<br />
0.1uF<br />
0.1uF<br />
C35<br />
0.1uF<br />
0.1uF<br />
C43<br />
0.1uF<br />
VCC18A<br />
C40<br />
0.1uF<br />
*<strong>Note</strong>5-4:<br />
The external 3.3V <strong>to</strong> 1.8V Voltage Regula<strong>to</strong>r circuit can<br />
be removed if the AX88742 build-in 3.3V <strong>to</strong> 1.8V Voltage<br />
Regula<strong>to</strong>r is enabled.<br />
<strong>Please</strong> <strong>refer</strong> <strong>to</strong> <strong>Note</strong>3-6 of Page 3 for more details.<br />
*<strong>Note</strong>5-5:<br />
(1) Get U3 3.3V voltage input from U5 VCC33:<br />
-- mount R45 and unmount R46. (Default)<br />
(2) Get U3 3.3V voltage input from U6 VCC33-18:<br />
-- mount R46 and unmount R45.<br />
C<br />
EEPROM<br />
*<strong>Note</strong>5-6<br />
*<strong>Note</strong>5-6:<br />
The AX88742 supports 8-bit mode EEPROM only.<br />
You can select the 93C46/93C56/93C66 EEPROM<br />
by setting the EESK and EECS signals level.<br />
VCC33<br />
R8<br />
4.7K<br />
VCC33<br />
R7<br />
4.7K<br />
VCC33<br />
R9 4.7K<br />
EECS<br />
EESK<br />
EEDIO<br />
1<br />
2<br />
3<br />
4<br />
U2<br />
CS<br />
SK<br />
DI<br />
DO<br />
VCC 8<br />
NC 7<br />
ORG 6<br />
GND 5<br />
VCC33<br />
C4<br />
0.1uF<br />
EESK<br />
EECS<br />
AT93C66A<br />
SOIC-8P<br />
B<br />
EEPROM Model Setting:<br />
(High:Pull-High, Low:Pull-Low)<br />
TYPE SIZE EESK EECS<br />
N/A (Default) - Low Low<br />
93C46 1K Low High<br />
93C56 2K High Low<br />
93C66 4K High High<br />
EECS<br />
EESK<br />
EEDIO<br />
U1<br />
CS<br />
SK<br />
DI<br />
DO<br />
NC,AT93C66A<br />
DIP-8P<br />
Optional<br />
1<br />
2<br />
3<br />
4<br />
VCC 8<br />
NC 7<br />
ORG 6<br />
GND 5<br />
VCC33<br />
GND<br />
R10<br />
4.7K<br />
B<br />
A<br />
A<br />
8<br />
7<br />
6<br />
5<br />
4<br />
3<br />
2<br />
Title<br />
<strong>ASIX</strong> ELECTRONICS CORPORATION<br />
POWER / EEPROM<br />
Size Document Number Rev<br />
C<br />
1.40<br />
AX88742_PCBV2.0<br />
Sunday, April 04, 2010<br />
Date: Sheet of<br />
5 6<br />
1
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