Floating Point Vector Processing on an FPGA
Floating Point Vector Processing on an FPGA
Floating Point Vector Processing on an FPGA
SHOW LESS
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
<str<strong>on</strong>g>Vector</str<strong>on</strong>g> L<strong>an</strong>e<br />
• Each l<strong>an</strong>e c<strong>on</strong>sists of a functi<strong>on</strong>al unit, a partiti<strong>on</strong> of<br />
vector register file <strong>an</strong>d vector flag register<br />
• Similar to SIMD extensi<strong>on</strong>s in popular instructi<strong>on</strong> sets:<br />
– Intel’s MMX, SSE, PowerPC’s AltiVec
Change language