Floating Point Vector Processing on an FPGA
Floating Point Vector Processing on an FPGA
Floating Point Vector Processing on an FPGA
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
Experimental Setup<br />
• Design implemented <strong>on</strong> Xilinx<br />
ML510 board<br />
• 32‐bit PLB based system bus<br />
• Embedded system runs at 100<br />
MHz<br />
• PowerPC program code is<br />
compiled with gcc using –o2<br />
optimizati<strong>on</strong><br />
• FPU <strong>on</strong>ly used for comparis<strong>on</strong><br />
• FPVC program code is written in<br />
machine code <strong>an</strong>d unoptimized<br />
• Program <strong>an</strong>d Data Dt are stored din<br />
BRAM (main memory)<br />
• Main metric for perform<strong>an</strong>ce<br />
measurement is number of clock<br />
cycles
Change language