Floating Point Vector Processing on an FPGA
Floating Point Vector Processing on an FPGA
Floating Point Vector Processing on an FPGA
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<str<strong>on</strong>g>Floating</str<strong>on</strong>g> <str<strong>on</strong>g>Point</str<strong>on</strong>g> <str<strong>on</strong>g>Vector</str<strong>on</strong>g> Core<br />
• Aut<strong>on</strong>omous from the<br />
main processor<br />
• Supports vector scalar ISA<br />
• 4 stage RISC pipeline<br />
• in‐order issue, out of<br />
order completi<strong>on</strong><br />
– Arbiter h<strong>an</strong>dles completi<strong>on</strong><br />
• Unified vector scalar<br />
general purpose register<br />
file<br />
• Uses NU VFLOAT library<br />
for floating point units
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