Concurrent Systems II - Bad Request - Trinity College Dublin

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Model Checking • “Model checking is an automated technique that, given a finite-state model of a system and a logical property, systematically checks whether this property holds for (a given initial state in) that model.” [Clarke & Emerson 1981]* ◾ A safety property asserts that nothing bad happens (e.g. no deadlocked states). ◾ A liveness property asserts that something good will eventually happen (e.g. always normal termination). E. M. Clarke and E. A. Emerson. Design and synthesis of synchronization skeletons using branching time temporal logic. In Logic of Programs: Workshop, Yorktown Heights, NY, May 1981, volume 131 of LNCS. Springer, 1981 ◾ Clarke & Emerson (CMU) and Joseph Sifakis (Grenoble) won the ACM Turing Award 2007 for their work on Model Checking ◾ Based on: http://ls1-www.cs.uni-dortmund.de/~tick/Lehre/SS06/MC/Spin-1.pdf & http://ls1-www.cs.uni-dortmund.de/~tick/Lehre/SS06/MC/Spin-2.pdf 136 Trinity College Dublin © Mike Brady 2007–2009
Promela • Promela [Protocol/Process Meta Language is a modelling language, not a programming language. • A Promela model consist of: ◾ type declarations ◾ channel declarations // we won’t be using these ◾ global variable declarations ◾ process declarations ◾ [init process] initialises variables and starts processes mtype, constants, typedefs (records) • A Promela model corresponds to a finite transition system, so: ◾ no unbounded data / channels / processes / process creation - simple vars - structured vars - vars can be accessed by all processes behaviour of the processes: local variables + statements 137 Trinity College Dublin © Mike Brady 2007–2009
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Concurrent Systems II (CS3D4/CS3BA2
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POSIX Threads • POSIX Threads aka
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Six Separate Threads Master Thread
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Where… • ‘thread’ is the ID
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Hello World -- Creating Threads int
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Hello World -- Thread Function void
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Wilde/Stoker/Ubuntu h-3.1$ cc -lpth
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Interaction • No thread interacti
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Interactions & Dependencies • Int
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…to do Parallel Programming • H
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Hardware Main Memory Level 2 Cache
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Shared Memory Machine • Each proc
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Concurrent Program • A Concurrent
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Communication • A parallel progra
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1 - Flow Dependence S1: write to lo
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3 - Output Dependence S1: write to
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Dependence in Loops j k k i 1 2 j 5
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How can we transform it? • We can
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Issues: • The variable sum, as wr
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Summarising: • We could paralleli
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Example • Sample function: y = 0.
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Synchronisation • We’ve looked
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Shared Variable S: Thread 1 after T
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Mutual Exclusion in pthreads. • M
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Shared Variable S Protected by Mute
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Lock and Unlock Mutex • pthread_m
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} /********** Critical Section ****
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Problem Tutorial • The transpose
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Producers and Consumers • Essenti
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Condition Variables (2) • Dramati
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From Thread U’s POV (2) • If C
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From Thread U’s POV (4) • Acqui
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Thread S (2) • Acquire Mutex M
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Semaphores • Computer Semaphores
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Semaphore Consumer ◾Acquire Mutex
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Semaphores (3) • Useful for count
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Sample Solution for ∏ • Calcula
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unsigned long long clock_cycles() {
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The Challenge of Concurrency • Co
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Concurrent Execution • A concurre
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Notation Trivial Concurrent Program
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Trivial Concurrent Program p1: n
Page 85 and 86: Example — Jumping Frogs • A fro
Page 87 and 88: If the frogs can only move “forwa
Page 89 and 90: State Diagrams for Processes • A
Page 91 and 92: Book Reference Principles of concur
Page 93 and 94: Correctness • (Correctness in Seq
Page 95 and 96: Using State machines • We can des
Page 97 and 98: The Critical Section Problem (2)
Page 99 and 100: Observations & Implications • Rem
Page 101 and 102: Simplify Critical Section Problem i
Page 103 and 104: State Transitions r1,s1,1 r1: await
Page 105 and 106: Deadlock Free? • Deadlock Free: I
Page 107 and 108: Scorecard Mutual Exclusion Deadlock
Page 109 and 110: Attempt #2 Critical Section Problem
Page 111 and 112: Attempt #2 Fails… • Attempt 2 f
Page 113 and 114: Attempt #3 Critical Section Problem
Page 117 and 118: Attempt #4 loop forever Critical Se
Page 121 and 122: Attempt #5, derived from #4 Critica
Page 123 and 124: Verification of concurrent programs
Page 125 and 126: A quick overview of some mathematic
Page 127 and 128: A quick overview of some mathematic
Page 129 and 130: Proving correctness by induction
Page 131 and 132: A quick overview of some temporal l
Page 133 and 134: A quick overview of some temporal l
Page 135: Temporal logic at work • Consider
Page 139 and 140: Process (2) • A process type (pro
Page 141 and 142: SPIN Hello World Example SPIN = Sim
Page 143 and 144: Promela Variables (2) • Arrays
Page 145 and 146: Statements (2) • The skip stateme
Page 147 and 148: If Statement if :: (n % 2 != 0) ->
Page 149 and 150: Atomic Statement atomic { stat1; st
Page 151 and 152: Process Execution / Evaluation Sema
Page 153 and 154: The Closed World Assumption • The
Page 155 and 156: Process memory management • In a
Page 157 and 158: Virtual memory • Give each proces
Page 159 and 160: Virtual memory 0 0 process 1 2 32 0
Page 161 and 162: Memory management requirements and
Page 163 and 164: E.g. Virtual memory implementation
Page 165 and 166: Multi-level page tables Virtual add
Page 167 and 168: Typical process memory layout memor
Page 169 and 170: Translation look aside buffer • E
Page 171 and 172: Page fault handling Start Access pa
Page 173 and 174: Fetch policy • When should a page
Page 175 and 176: Page replacement policy • A page
Page 177 and 178: Page replacement policy • First-I
Page 179 and 180: Clock Algorithm 179 Trinity College
Page 181 and 182: Resident set management • Variabl
Page 183 and 184: Resident set management Local Repla
Page 185 and 186: Resident set management Δ Working
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Resident set management 187 Trinity
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Cleaning policy • Page buffering
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Load control • We can use a few d
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Process state transitions • Proce
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Preemptive and nonpreemptive schedu
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Scheduling algorithms • First-Com
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Scheduling algorithms • Shortest-
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Scheduling algorithms • Priority
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Scheduling algorithms • Round-Rob
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Example Process Arrival Time Next B
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Scheduling algorithms • Multi-lev
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Scheduling algorithms • Multi-lev
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Multi-processor scheduling • Flyn
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Layered file I/O (1) Application Di
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Disk access • Disks are slow ◾
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Disk scheduling • So, the order i
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Disk scheduling algorithms (2) •
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