M_TTCAN - User Manual - Bosch Semiconductors and Sensors

M_TTCAN Revision 3.0.2
2.3.3 Endian Register (ENDN)
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0x004
ETV[31:16]
R-0x8765
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ETV[15:0]
R = Read; -t = test value
Table 4 Endian Register (address 0x004)
R-0x4321
Bits 31:0 ETV[31:0]: Endianness Test Value
The endianness test value is 0x87654321.
2.3.4 Fast Bit Timing & Prescaler Register (FBTP)
This register is only writable if bits CCCR.CCE and CCCR.INIT are set. The CAN bit time may be
programed in the range of 4 to 25 time quanta. The CAN time quantum may be programmed in the
range of 1 to 32 m_ttcan_cclk periods. t q = (FBRP + 1) m_ttcan_cclk period.
FTSEG1 is the sum of Prop_Seg and Phase_Seg1. FTSEG2 is Phase_Seg2.
Therefore the length of the bit time is (programmed values) [FTSEG1 + FTSEG2 +3]t q
or (functional values) [Sync_Seg + Prop_Seg + Phase_Seg1 + Phase_Seg2] t q .
The Information Processing Time (IPT) is zero, meaning the data for the next bit is available at the
first clock edge after the sample point.
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0x0C res TDCO[4:0] TDC res FBRP[4:0]
R-0 RP-0 RP-0 R-0 RP-0x00
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
res FTSEG1[3:0] res FTSEG2[2:0] res FSJW[1:0]
R-0 RP-0xA R-0 RP-0x3 R-0 RP-3
Table 5
R = Read, P = Protected write; -n = value after reset
Fast Bit Timing & Prescaler Register (address 0x0C)
Bits 28:24 TDCO[4:0]: Transceiver Delay Compensation Offset
0x00-0x1F Offset value defining the distance between the measured delay from m_ttcan_tx to
m_ttcan_rx and the secondary sample point. Valid values are 0 to 31 m_ttcan_cclk
periods.
Bit 23 TDC: Transceiver Delay Compensation
0= Transceiver Delay Compensation disabled
1= Transceiver Delay Compensation enabled
8 14.02.2013