M_TTCAN - User Manual - Bosch Semiconductors and Sensors

M_TTCAN Revision 3.0.2
2.3.8 Bit Timing & Prescaler Register (BTP)
This register is only writable if bits CCCR.CCE and CCCR.INIT are set. The CAN bit time may be
programed in the range of 4 to 81 time quanta. The CAN time quantum may be programmed in the
range of 1 to 1024 m_ttcan_cclk periods. t q = (BRP + 1) m_ttcan_cclk period.
TSEG1 is the sum of Prop_Seg and Phase_Seg1. TSEG2 is Phase_Seg2.
Therefore the length of the bit time is (programmed values) [TSEG1 + TSEG2 +3]t q
or (functional values) [Sync_Seg + Prop_Seg + Phase_Seg1 + Phase_Seg2] t q .
The Information Processing Time (IPT) is zero, meaning the data for the next bit is available at the
first clock edge after the sample point.
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0x1C res BRP[9:0]
R-0 RP-0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
res TSEG1[5:0] TSEG2[3:0] SJW[3:0]
R-0 RP-0x0A RP-0x3 RP-3
Table 9
R = Read, P = Protected write; -n = value after reset
Bit Timing & Prescaler Register (address 0x1C)
Bits 25:16 BRP[9:0]: Baud Rate Prescaler
0x000-0x3FFThe value by which the oscillator frequency is divided for generating the bit time
quanta. The bit time is built up from a multiple of this quanta. Valid values for the
Baud Rate Prescaler are 0 to 1023. The actual interpretation by the hardware of this
value is such that one more than the value programmed here is used.
Bits 13:8 TSEG1[5:0]: Time segment before sample point
0x01-0x3F Valid values are 1 to 63. The actual interpretation by the hardware of this value is
such that one more than the programmed value is used.
Bits 7:4
0x0-0xF
TSEG2[3:0]: Time segment after sample point
Valid values are 0 to 15. The actual interpretation by the hardware of this value is
such that one more than the programmed value is used.
Bits 3:0
0x0-0xF
SJW[3:0]: (Re) Synchronization Jump Width
Valid values are 0 to 15. The actual interpretation by the hardware of this value is
such that one more than the value programmed here is used.
Note: With a CAN clock (m_ttcan_cclk) of 8 MHz, the reset value of 0x00000A33 configures the
M_TTCAN for a bit rate of 500 kBit/s.
14 14.02.2013