M_TTCAN - User Manual - Bosch Semiconductors and Sensors
M_TTCAN - User Manual - Bosch Semiconductors and Sensors
M_TTCAN - User Manual - Bosch Semiconductors and Sensors
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M_<strong>TTCAN</strong> Revision 3.0.2<br />
2.3.24 New Data 1 (NDAT1)<br />
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
0x98 ND31 ND30 ND29 ND28 ND27 ND26 ND25 ND24 ND23 ND22 ND21 ND20 ND19 ND18 ND17 ND16<br />
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0<br />
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
ND15 ND14 ND13 ND12 ND11 ND10 ND9 ND8 ND7 ND6 ND5 ND4 ND3 ND2 ND1 ND0<br />
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0<br />
R = Read; -n = value after reset<br />
Table 25 New Data 1 (address 0x98)<br />
Bit 31:0 ND[31:0]: New Data<br />
The register holds the New Data flags of Rx Buffers 0 to 31. The flags are set when the respective<br />
Rx Buffer has been updated from a received frame. The flags remain set until the Host clears them.<br />
Aflag is cleared by writing a ’1’ to the corresponding bit position. Writing a ’0’ has no effect. Ahard<br />
reset will clear the register.<br />
0= Rx Buffer not updated<br />
1= Rx Buffer updated from new message<br />
2.3.25 New Data 2 (NDAT2)<br />
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
0x9C ND63 ND62 ND61 ND60 ND59 ND58 ND57 ND56 ND55 ND54 ND53 ND52 ND51 ND50 ND49 ND48<br />
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0<br />
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
ND47 ND46 ND45 ND44 ND43 ND42 ND41 ND40 ND39 ND38 ND37 ND36 ND35 ND34 ND33 ND32<br />
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0<br />
Table 26<br />
R = Read; -n = value after reset<br />
New Data 2 (address 0x9C)<br />
Bit 31:0 ND[63:32]: New Data<br />
The register holds the New Data flags of Rx Buffers 32 to 63. The flags are set when the respective<br />
Rx Buffer has been updated from a received frame. The flags remain set until the Host clears them.<br />
Aflag is cleared by writing a ’1’ to the corresponding bit position. Writing a ’0’ has no effect. Ahard<br />
reset will clear the register.<br />
0= Rx Buffer not updated<br />
1= Rx Buffer updated from new message<br />
30 14.02.2013