Download Presentation - Arrow Electronics
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1oo1D Dual Core Safety Concept<br />
– Unique design to reduce common<br />
cause failures (βIC)<br />
– Second CPU mirrored and<br />
rotated<br />
– Minimum distance 100µm<br />
between CPUs<br />
– Cycle delayed lockstep<br />
– Guard ring per CPU<br />
– Duplicated clock tree per CPU<br />
Output + Control<br />
Cycle Delay<br />
ARM ®<br />
Cortex -R4F<br />
> 100um<br />
CCM<br />
Self<br />
Test<br />
Compare<br />
Error<br />
– CPU Compare Module (CCM)<br />
– Self-test capability<br />
– Self-test error injection/error<br />
forcing<br />
– Output error injection<br />
Input + Control<br />
Cycle Delay<br />
6
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