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Lead Free Soldering - SMTA

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DFX FOR LEAD FREE PROCESSING<br />

AND RELIABILITY<br />

Presented By: Dale Lee<br />

E-mail: Dale.Lee@Plexus.Com<br />

1


WHAT DOES LEAD FREE MEAN TO YOU<br />

Original RoHS Directive - Originally 8<br />

Categories<br />

RoHS2 Directive:<br />

Categories 8 (Medical Devices) & 9<br />

(Monitoring and Control<br />

Instrumentation) Are Now In Scope<br />

22-July 2014 – General Medical Devices<br />

22 July 2016 – In Vitro Medical Devices<br />

Active Implantable Devices<br />

• Out Of Scope At This Time<br />

• Review For Inclusion In 2020<br />

Defense Excluded From<br />

Specification<br />

2


TECHNOLOGY DRIVEN DESIGNS<br />

Component packaging technology trends:<br />

• Decrease in size (length, width, thickness)<br />

• Increase in functionality (electrical, optical, electrical mechanical and<br />

mechanical)<br />

• Interconnection density per unit area is increasing (increased number of<br />

layers, smaller lines and spaces)<br />

• Assembly functional performance is increasing (thermal, mechanical,<br />

electrical)<br />

Assembly process complexities continue to increase and LEAD FREE Soldered<br />

3


LEAD FREE SOLDER ADVANTAGES<br />

Material Costs<br />

• NO<br />

– More Expensive<br />

Reflow Temperature<br />

• NO<br />

– Higher Temperatures For Reflow & Rework<br />

– Increased Component & PCB TCE Mismatch (Warp, Crack)<br />

– Increased Z-axis Expansion<br />

Through Hole <strong>Soldering</strong><br />

• NO<br />

– Higher Hand and Rework Solder Temperature<br />

– Greater <strong>Lead</strong> to Hole Clearance<br />

– Increased Copper Dissolution<br />

Assembly Process Physics<br />

• Yes<br />

– Tighter SMT <strong>Lead</strong> Pitch Packages<br />

– Increased Secondary Side SMT Package Mass<br />

– Decreased Tombstone Components<br />

– Increased Off Pad Printing Compatibility (Pin-in-Paste)<br />

Reliability<br />

• Maybe<br />

– Dependant Upon Environmental Conditions.


MEET FUNCTIONAL AND LEGISLATIVE REQUIREMENTS<br />

RoHS/non-RoHS compatible analysis ensures compliance with regulatory and<br />

product reliability and assembly requirements<br />

Not all RoHS compliant components are lead free soldering process compatible<br />

Not All RoHS compliant components are backward compatible with tin/lead<br />

solder process<br />

RoHS & Green Information<br />

Part #<br />

Supplier<br />

<strong>Lead</strong>-<br />

<strong>Free</strong><br />

RoHS<br />

RoHS<br />

Exemption<br />

RoHS<br />

Exemption<br />

Type<br />

Component<br />

Engineer<br />

Comment<br />

Terminal<br />

Plating<br />

MSL<br />

Max<br />

Temp<br />

C of C/<br />

Datasheet<br />

C0402C102K3RACTU<br />

RK73H1ETTP1002F<br />

NACE221M<br />

10V8X6.5TR13F<br />

Kemet<br />

Electronics<br />

KOA Speer<br />

Electronics<br />

Compliant Compliant No Matte Sn 1 260°C Link<br />

Not<br />

Compliant<br />

Compliant Yes 7.c-1 Matte Sn 1 260°C Link<br />

NIC Compliant Compliant Matte Sn 1 235°C Link<br />

0402YA331JATAT2A AVX/Kyocera Compliant Compliant Sn/Bi 1 260°C Link<br />

5


LEAD FREE ASSEMBLY IMPACTS TO PCB LAMINATE<br />

Traditional G10 and FR4 printed circuit board laminates cannot survive multiple<br />

elevated lead free soldering process exposure or sustain impact to reliability<br />

IPC Material Specifications (IPC-4101) For Epoxy Glass <strong>Lead</strong> <strong>Free</strong> Laminates are:<br />

IPC-4101 /126 or /129 – Halide Flame Retardant (FR4), 170 Tg<br />

IPC-4101 /130 or /131 – Low Halide Flame Retardant, 170 Tg<br />

Severity of reliability impacts are influenced by:<br />

• Assembly process thermal exposure conditions<br />

• Board design – number of layers, conductor routing<br />

• Component package types<br />

• Conductor / component placement density<br />

• Operational environment<br />

Photos courtesy of Cookson and<br />

Universal Instruments<br />

6


MICRO-VIA DESIGN – RELIABILITY IMPACTS<br />

Different Via Hole<br />

Structures<br />

Impact<br />

Resistance To<br />

Assembly,<br />

Rework or<br />

Handling<br />

Damage<br />

Design and Construction Affects on PWB Reliability, Paul Reid,<br />

IPC Apex Proceedings 2012.


PRINTED CIRCUIT BOARD FINISHES<br />

Final printed circuit board finish impacts<br />

the ability to solder surface mount and<br />

through holes components reliably and<br />

cost effectively.<br />

Assembly Characteristics<br />

<strong>Lead</strong><br />

<strong>Free</strong><br />

HASL<br />

OSP<br />

Immer<br />

Silver ENIG ENEPIG<br />

Fine Pitch <strong>Lead</strong>ed SMT Components Neutral Plus Plus Plus Plus<br />

Chip Components (Passives)* Plus Plus Plus Plus Plus<br />

Area Array (BGA/CGA) Plus Plus Plus Plus Plus<br />

Reflow & Wave Soldered (SMT & PTH) Plus Neutral Plus Plus Minus<br />

Wave Soldered PCB (SMT and PTH Components) Plus Neutral Neutral Plus Minus<br />

Wave Soldered PCB (PTH Components Only) Plus Neutral Neutral Plus Minus<br />

8


LEAD TO HOLE CLEARANCE<br />

<strong>Lead</strong> Angle In Hole Combined With<br />

<strong>Lead</strong> Clearance, <strong>Lead</strong> Shape And<br />

Flux Quantity Can Impact Void<br />

Creation In Plated Through Hole.<br />

• <strong>Lead</strong> Type Can Impact Void Creation<br />

– Round Versus Flat Ribbon<br />

• <strong>Lead</strong> / Hole Metallization Can Impact<br />

Void Creation<br />

– Faster Wetting Rate = Greater Risk<br />

Of Void Creation *<br />

K. Seelig, et al, “<strong>Lead</strong>-<strong>Free</strong> Solder Assembly For Mixed<br />

Technology Circuit Boards”, <strong>SMTA</strong>-I 2006


LEAD TO HOLE CLEARANCE<br />

<strong>Lead</strong> <strong>Free</strong> <strong>Soldering</strong><br />

• <strong>Lead</strong> Clearance Minimum May<br />

Increase<br />

• Increasing Board Thickness May<br />

Further Increase <strong>Lead</strong> To Hole<br />

Clearance (Aspect Ratio)<br />

• Larger Holes Create Less Voids<br />

Smaller <strong>Lead</strong> To Hole Clearance<br />

Decreases Shrinkage Holes /<br />

Hot Tear Joints<br />

IPC-A-610D, Fig. 5.67


INTERNAL PCB IMPACTS<br />

Number of layer connections to plated<br />

through-hole<br />

• Increased number of layer<br />

connections increases thermal<br />

mass of plated through-hole<br />

• Increased number of plane layer<br />

connections greatly increases<br />

thermal mass of plated throughhole<br />

• Increase thermal pad isolation to<br />

improve solder flow to topside<br />

Higher solder temperatures or<br />

increased solder dwell times create<br />

problems with pads on solder side<br />

11


WAVE SOLDER & REWORK ISSUES<br />

Limit Effects Of Copper Dissolution<br />

Use Lower Dissolution Rate<br />

Solder Alloy<br />

• Modified SAC Alloy<br />

(Sb, Ni, Zn, Ge, In, Etc)<br />

• Non-SAC Alloy<br />

(Sn/Cu/Ni, Etc)<br />

Original<br />

SnPb<br />

0.005” Trace Dissolution in 30 Seconds<br />

Pad Trace Connection<br />

– Tear Drop<br />

– Snow Man Connection<br />

– Wide Trace<br />

– Greater Than 0.010”<br />

SAC 305<br />

SN100C<br />

After wave soldering, 265 o C<br />

solder temperature, 12 seconds<br />

contact time<br />

PCB Photo Courtesy of Cookson – Alpha Metals<br />

Byle, Jean & Lee, “Copper Dissolution Rate in Pb-<strong>Free</strong> <strong>Soldering</strong> Fountain Systems”,<br />

<strong>SMTA</strong>-I 2006


THROUGH HOLE PAD DESIGN<br />

Square Pads Should Not Be Used On Solder Side<br />

Increased Pad Lifting*<br />

Increased Solder Defect – Bridge/Flag/Web<br />

Decrease Component / Top Side Pad Size**<br />

Reduced Fillet Lifting<br />

* Dr. S. Zweiger, Solectron GMBH, Productronica Green Day, November 2005<br />

** K Puttlitz, K Stalter, “Handbook of <strong>Lead</strong>-<strong>Free</strong> Solder Technology For Microelectronic Assembly”, pp 628, Fig 48


THROUGH HOLE PAD DESIGN<br />

All Pads Should Be Same Shape<br />

• Oval or Round<br />

• Pin 1 square pad should not be used on solder<br />

side<br />

• In some situation legend ink in between pads<br />

can help to minimize solder bridges<br />

High Density Components (< 2mm Pitch)<br />

• Pads Should Be Oval In Shape<br />

• Staggered Pad Designs Should Be Used To<br />

Enhance Solder Joint Formation On Exit Side Of<br />

Component


SOLDER MASK SELECTION IMPACT<br />

A Low Surface Energy “Glossy” Finish Can Generate<br />

Solder Defects Similar In Appearance Of No Flux Or<br />

Too Little Flux On The Board.<br />

Resulting in Whiskers, Strings, Peaks, Bridges, Icicles,<br />

Solder Balls, Solder Web, Solder Flags


DEFECTS CAUSED BY IMPROPER THERMAL BALANCE<br />

Wave Solder Process<br />

Thermal Shock<br />

Damage<br />

LED lead<br />

LED<br />

Increase Thermal Pad<br />

Isolation<br />

Balance Number<br />

Connections For<br />

Component Per Each<br />

Plated Through Hole<br />

Uniformity Of Trace<br />

Size Connection To<br />

Component Plated<br />

Through Hole


THROUGH-HOLE COMPONENT MOUNTING<br />

<strong>Lead</strong>s Should Extend Below<br />

Bottom of Board<br />

<strong>Lead</strong> Protrusion: Shorter is<br />

Better<br />

• Decreased Solder Bridging<br />

• Decreased Component Tilting<br />

<strong>Lead</strong> <strong>Free</strong> Solder:<br />

• <strong>Lead</strong> Length Should Be Even Shorter<br />

Than Tin-<strong>Lead</strong> Solder.


EFFECT OF BOARD THICKNESS ON TOPSIDE FILLET<br />

FORMATION<br />

Board thickness increase thermal<br />

mass of plated through-hole<br />

Increase thermal pad isolation to<br />

improve solder flow to the top<br />

side<br />

Increase lead hole clearance<br />

(aspect ratio) to improve solder<br />

flow to top side<br />

0.062”<br />

0.100”<br />

0.150”<br />

Board Thickness


Are You Confused<br />

About Design For<br />

Manufacturing<br />

Requirements In<br />

Today’s <strong>Lead</strong> <strong>Free</strong><br />

<strong>Soldering</strong> World<br />

QUESTIONS SO FAR


COMPONENT PACKAGING AND DESIGN IMPACTS<br />

0.2 mm<br />

0.4 mm<br />

0.8 mm<br />

1.0 mm<br />

Increased use of leadless component packaging technology<br />

• Ball Grid Array (BGA)<br />

• Quad Flatpack No-lead (QFN)<br />

Increased sensitivity component/printed circuit board flatness<br />

• Internal split plane or partial plane<br />

• Nonfunctional pad removal<br />

Increased use of component packaging with finer lead pitches<br />

• 0.65mm > 0.5mm > 0.4mm > 0.35mm > 0.3mm > <br />

1.27 mm<br />

20


SOLDER MASK DESIGN AND FABRICATOR INCONSISTENCY<br />

Non-solder mask defined (NSMD)<br />

• Size of pad defined by copper pad and interconnections<br />

(variable size)<br />

• Solder encapsulates pad<br />

• Limited to components with lead pitch greater than 0.4mm<br />

Solder mask defined (SMD)<br />

• Size of pad defined by solder mask opening (uniform size)<br />

• Solder covers exposed pad (fills opening)<br />

• Required for components with lead pitch 0.4mm or less<br />

• Preferred for leadless array devices like land grid arrays,<br />

multi-row quad flatpack no-leads, etc<br />

Solder mask fabrication consistency<br />

• Fabrication note interpretation “No solder mask permissible<br />

on pads unless provided this way on supplied artwork”<br />

• Selective solder mask opening changes between PCB<br />

suppliers<br />

21


ETCH IMPACTS OF SMALLER COMPONENT PACKAGES<br />

Increased PCB supplier control/capability understanding may be required to<br />

ensure proper etch compensation values are applied to other surface features and<br />

not to conductor patterns.<br />

Supplier A<br />

Percentage reduction by pad size<br />

Supplier B<br />

22


IMPACTS OF INTERCONNECT DESIGN<br />

Placement and types of vias in pad can affect assembly solder joint formation<br />

More of an impact on smaller components and/or lower number<br />

of electrical connections<br />

Design and Construction Affects on PWB Reliability,<br />

Paul Reid, IPC Apex Proceedings 2012.<br />

23


STACKED VIA IN PAD FAILURE MODE<br />

<strong>Lead</strong> free laminate is less ductile<br />

<strong>Lead</strong> free solder is less ductile<br />

Increased stress transmission to<br />

internal connections<br />

• Test fixture<br />

• Assembly fixtures<br />

• System integration<br />

• Environmental<br />

24


BOTTOM TERMINATE COMPONENT SENSITIVITY<br />

Components without leads are more sensitive to minor design and assembly<br />

process changes<br />

• Land pattern design<br />

– Exposed pad size uniformity<br />

• Component /printed circuit board flatness/warping<br />

– Copper distribution under package<br />

• Paste volume control<br />

– Pad to pad volume<br />

– Pad to design defined volume<br />

25


COMPONENT ISSUES - WARPAGE<br />

Higher <strong>Lead</strong> <strong>Free</strong> Solder Solidification and Process Temperatures,<br />

Increases The Amount Of Thermal Expansion Mismatch Of<br />

Components Which Can Increase Amount Of Component Warping<br />

During Assembly Process<br />

May Require Redesign Of Package (Material Selection) For Thermal Mass And<br />

Expansion Balance.


COMPONENT ISSUES – WARPAGE & THERMAL SHOCK<br />

May Require Change In Production<br />

Process<br />

Tooling To Bridge Warpage Gap.<br />

(Increased Solder Paste Volume Application, etc.)<br />

Reflow Profile To Bridge Warpage Gap.<br />

(Decreased Thermal Change Rate – Reduce Surface To<br />

Cooler Location Temperature Delta - TCE Induced<br />

Warpage)<br />

Reflow Profile To Reduce Micro Cracks In<br />

Multilayer Ceramic Capacitor Chips & Arrays.<br />

(Decreased Thermal Change Rate – Reduce Surface To<br />

Cooler Location Temperature Delta For Chip > 1210)


COMPONENT PAD - THERMAL IMBALANCE<br />

Multiple trace connections<br />

• Trace connections per pad<br />

• Uniformity across all pads on<br />

single component<br />

Solder mask defined pad<br />

increased soldering defects<br />

• Delayed reflow across surface<br />

mount technology components<br />

– Tombstone components<br />

– “Ball in socket” area array<br />

component<br />

28


COMPONENT PAD - THERMAL IMBALANCE<br />

Small Passive Component Pad Design<br />

• Mixed Solder Mask Defined<br />

– Multiple/Large Trace<br />

– Exposed Plane<br />

• Smaller Component Package, The Greater The Impact


COMPONENT PAD - THERMAL IMBALANCE<br />

“Via in pad” placement may<br />

create mounting pad height<br />

differences<br />

• More of an impact on smaller<br />

and/or lower lead count or<br />

leadless (no solder ball/solder<br />

bump) component packages<br />

30


STENCIL TO PCB ALIGNMENT<br />

Smaller components decrease total PCB and assembly process tolerance<br />

Minor misalignment can impact process yields<br />

3 mil<br />

6 mil<br />

31


TIN-LEAD AND LEAD FREE SOLDER DIFFERENCES<br />

Stencil alignment of solder<br />

paste to pad tolerance may be<br />

critical to good manufacturing<br />

yields<br />

(Dependant upon PCB surface<br />

finish)<br />

Tin-lead paste<br />

<strong>Lead</strong> free paste<br />

Alpha Metals, SMT Mag Webcast<br />

January 2006<br />

32


TIN-LEAD VS LEAD FREE WICKING<br />

Depending upon the pairing of PCB surface finish and component lead finish, the<br />

amount of solder wicking/spread can induce or reduce solder defect formation<br />

with lead free soldering process<br />

Copper, tin, silver and gold <strong>Lead</strong> free Tin-lead<br />

33


TO CLEAN OR NOT TO CLEAN<br />

Ability to remove soldering process residues from PCBs may change due to<br />

• Component package type<br />

• Component size<br />

• Solder mask design<br />

34


TEST POINT AND SUPPORT DISTRIBUTION<br />

Determines probe accessibility to the various components/nets for<br />

the purpose of in-circuit testing and concentrate test probe stress<br />

into localized area.<br />

• Fixture induced printed circuit board bending during test<br />

• Fixture induced bending during functional test from connector<br />

mating/unmating.<br />

35


MECHANICAL STRESS/STRAIN IMPACTS<br />

Mechanical stress/strain impact analysis to identify test-initiated potential latent<br />

field failure modes<br />

• Solder joint crack initiation or fracture<br />

• Micro/buried via design impacts<br />

– Surface copper cracking/separation<br />

– Internal copper cracking/separation<br />

• Mechanical strain concentration<br />

– Test point concentration<br />

– Final assembly/disassembly<br />

36


EXAMPLE OF EXCESSIVE STRESS<br />

BGA Connection Near J5<br />

• Bottom 3 Solder<br />

Connections<br />

• Two (2) Rows Of Solder<br />

Balls<br />

K<br />

L<br />

M<br />

1<br />

2<br />

37


THANK YOU!<br />

Dale Lee<br />

Dale.Lee@Plexus.Com


QUESTIONS<br />

39

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