M32C/83 Group Hardware Manual - TE-EPC-LPC

M32C/83
Group
21. Intelligent I/O (Group 0, 1 Communication Function)
Group 2 IEBus Control Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol Address After Reset
IECR 017216 00XX X0002
Bit
Symbol
Bit Name
Function
RW
IEB
IEBus Enable Bit (1)
0 : Disables IEBus (2)
1 : Enables IEBus
RW
IETS
IEBus Transmit Start
Request Bit
0 : Transmission is completed
1 : Transmission is started
RW
IEBBS
IEBus Busy Flag
0 : Idle state
1 : Busy state (start condition is detected)
RO
(b5 - b3)
DF
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Digital Filter
Select Bit
0 : No digital filter
1 : Digital filter
RW
IEM
IEBus Mode
Select Bit
0 : Mode 1
1 : Mode 2
NOTES:
1. Set the IEB bit while the base timer clock is stopped.
2. After the IEB bit is set to "0", keep "0" for at least 1 fBT2 cycle. Set the BCK1 to BCK0 bits in the
G2BCR0 register to "002" (clock stop) when setting the IEB bit to "1".
RW
Group 2 IEBus Address Register
b15
b8
b7
b0
Symbol Address After Reset
IEAR 017116 - 017016 Indeterminate
Function
RW
Address data
RW
Address data
RW
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Figure 21.44 IECR and IEAR Registers
Rev. 1.20 Jun. 01, 2004
REJ09B0034-0120Z
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