M32C/83 Group Hardware Manual - TE-EPC-LPC
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M32C/83 Group Hardware Manual - TE-EPC-LPC

M32C/83 Group Hardware Manual - TE-EPC-LPC

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<strong>M32C</strong>/<strong>83</strong><br />

<strong>Group</strong><br />

21. Intelligent I/O (<strong>Group</strong> 3 Communication Function)<br />

<strong>Group</strong> 3 SI/O Communication Mode Register<br />

b7 b6 b5 b4 b3 b2 b1<br />

b0<br />

Symbol Address After Reset<br />

G3MR 017A16 00XX 00002<br />

Bit<br />

Symbol<br />

GMD0<br />

GMD1<br />

Bit Name<br />

Communication Mode<br />

Select Bit<br />

b1<br />

0<br />

0<br />

1<br />

1<br />

b0<br />

0<br />

1<br />

0<br />

1<br />

Function<br />

: Communication unit is reset<br />

(The ROER bit is set to "0")<br />

: Clock synchronous serial I/O mode<br />

: Do not set to this value<br />

: Do not set to this value<br />

RW<br />

RW<br />

RW<br />

CKDIR<br />

Internal/External Clock<br />

Select Bit<br />

0 : Internal clock<br />

1 : External clock<br />

RW<br />

TLD<br />

Transfer Data Length<br />

Select Bit<br />

0 : 16 bits long<br />

1 : 8 bits long<br />

RW<br />

(b5 - b4)<br />

UFORM<br />

Nothing is assigned. When write, set to "0".<br />

When read, its content is indeterminate.<br />

Transfer Format<br />

Select Bit<br />

0 : LSB first<br />

1 : MSB first<br />

RW<br />

IRS<br />

Transmit Interrupt<br />

Cause Select Bit<br />

0 : No data is in the transmit buffer<br />

1 : Transmission is completed<br />

RW<br />

<strong>Group</strong> 3 SI/O Communication Control Register<br />

b7 b6 b5 b4 b3 b2 b1 b0<br />

Symbol Address After Reset<br />

G3CR 017B16 0000 X0002<br />

Bit<br />

Symbol<br />

Bit Name<br />

Function<br />

RW<br />

<strong>TE</strong><br />

Transmit Enable Bit<br />

0 : Transmit disable<br />

1 : Transmit enable<br />

RW<br />

TXEPT<br />

Transmit Register<br />

Empty Flag<br />

0 : Data is in transmit register<br />

(during transmission)<br />

1 : No data is in the transmit register<br />

(transmission is completed)<br />

RO<br />

TI<br />

Transmit Buffer<br />

Empty Flag<br />

0 : Data is in the G3TB register<br />

1 : No data is in the G3TB register<br />

RO<br />

(b3)<br />

Nothing is assigned. When write, set to "0".<br />

When read, its content is indeterminate.<br />

RE<br />

Receive Enable Bit<br />

0 : Receive disabled<br />

1 : Receive enabled<br />

RW<br />

RI<br />

Receive Complete<br />

Flag<br />

0 : No data is in the G3RB register<br />

1 : Data is in the G3RB register<br />

RO<br />

OPOL<br />

IPOL<br />

ISTxD Output Polarity<br />

Switch Bit<br />

ISRxD Input Polarity<br />

Switch Bit<br />

0 : No inverse<br />

1 : Inverse<br />

0 : No inverse<br />

1 : Inverse<br />

RW<br />

RW<br />

Figure 21.48 G3MR Register and G3CR Register<br />

Rev. 1.20 Jun. 01, 2004<br />

REJ09B0034-0120Z<br />

Page 318 of 477

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