Micron ® PISMO ™ Module Data Sheet
Micron ® PISMO ™ Module Data Sheet
Micron ® PISMO ™ Module Data Sheet
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Functional Block Diagram<br />
Advance<br />
<strong>PISMO</strong>2-00001: <strong>Micron</strong> Mobile DDR SDRAM + NAND <strong>Module</strong><br />
Functional Block Diagram<br />
Figure 2 illustrates the connections among the host system, the <strong>PISMO</strong>2-00001 DRAM<br />
and NAND interface, and the <strong>Micron</strong> DRAM and NAND devices. All NAND and DRAM<br />
interface signals are also connected straight through from bottom to top on the <strong>PISMO</strong>2<br />
connector except NA_CS[3:0] and DM_CS[1:0], which are connected as shown in“Chip-<br />
Select Routing” on page 10. The STATIC and FAST SERIAL interface signals are only<br />
“routed through” (no devices are connected).<br />
For clarity, in Figure 2, the NAND and DRAM interface signal connections between the<br />
top and bottom connectors have been omitted.<br />
Figure 2: <strong>PISMO</strong>2-00001 Functional Block Diagram<br />
CPU <strong>PISMO</strong>2-00001<br />
DRAM Controller<br />
DRAM<br />
Interface<br />
NAND Controller<br />
NAND<br />
Interface<br />
Auxiliary Signals<br />
Controller<br />
Auxiliary<br />
Interface<br />
DRAM<br />
Interface<br />
DM_ BUS<br />
NAND<br />
Interface<br />
NA_ BUS<br />
Auxiliary<br />
Signals<br />
Interface<br />
AUX_ BUS<br />
Mobile DDR<br />
SDRAM<br />
MT46H16M32LF<br />
1.8V NAND Flash<br />
MT29F1G16AB<br />
Microchip<br />
24AA64-I/ST I2C<br />
Serial EEPROM<br />
PDF: 09005aef827fda9b/Source: 09005aef827fda71 <strong>Micron</strong> Technology, Inc., reserves the right to change products or specifications without notice.<br />
<strong>PISMO</strong>2_00001_datasheet.fm - Rev. B 11/07 EN 9 ©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.
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