Chapter 4: The Instruction Set Architecture - 10/31/2013 02:13:31 ...

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4-2 Chapter 4: The Instruction Set Architecture Chapter Contents 4.1 Hardware Components of the Instruction Set Architecture 4.2 ARC, A RISC Computer 4.3 Pseudo-Ops 4.4 Examples of Assembly Language Programs 4.5 Accessing Data in Memory—Addressing Modes 4.6 Subroutine Linkage and Stacks 4.7 Input and Output in Assembly Language 4.8 Case Study: The Java Virtual Machine ISA Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring
4-3 Chapter 4: The Instruction Set Architecture The Instruction Set Architecture • The Instruction Set Architecture (ISA) view of a machine corresponds to the machine and assembly language levels. • A compiler translates a high level language, which is architecture independent, into assembly language, which is architecture dependent. • An assembler translates assembly language programs into executable binary codes. • For fully compiled languages like C and Fortran, the binary codes are executed directly by the target machine. Java stops the translation at the byte code level. The Java virtual machine, which is at the assembly language level, interprets the byte codes (hardware implementations of the JVM also exist, in which Java byte codes are executed directly.) Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring
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Page 11 and 12: 4-11 The ARC ISA • The ARC ISA is
Page 15 and 16: 4-15 Signed Integer Byte Signed For
Page 27 and 28: 4-27 0 0 Chapter 4: The Instruction
Page 29 and 30: 4-29 Input and Output for the ISA A
Page 33 and 34: 4-33 // This is file add.java Chapt

Chapter 4: The Instruction Set Architecture - 10/31/2013 02:13:31 ...

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