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VR Series Microprocessors
NEC Electronics Inc.
VR4122
64-Bit MIPS RISC
Microprocessor
NEC Electronics Inc.
Salient Features
VR4120 CPU running at 180 MHz (216
Dhrystone MIPS) with memory management
unit
MIPS I, II, III, and MIPS16 instruction set
compatible
Six-stage pipeline running at up to 180 MHz
Product Overview
Designed around the popular MIPS RISC architecture, the
64-bit VR4122 (µPD30122) offers excellent power
consumption and performance in a highly integrated, low-cost
system on a chip.
This processor uses the ultra-low-power-consuming VR4120
CPU core based on advanced 0.18-micron technology. The
VR4120 CPU has an optimized five-stage pipeline, 32 KB
instruction cache, 16 KB data cache, multiply-andaccumulate
(MAC) unit, and memory management unit
(MMU) to enable high performance in a compact, low-cost
chip.
The VR4122 is compliant with the MIPS I, II, III, and
MIPS16 instruction set architectures. It provides an easy
choice for VR4121 customers in terms of upgrade, since the
VR4121 and VR4122 are software compatible.
The VR4122 microprocessor’s high speed, compact size, and
low power consumption make it ideal for use in batterydriven,
portable handheld systems.
Ordering Information
Single-cycle 32-bit MAC instruction for DSP
operations
32 KB instruction cache, 16 KB data cache
Power management unit with four modes
Interrupt control unit and DMA controller
Real-time clock with four built-in timers
16550 serial interface with separate debug port
PCI bus interface unit supports 32-bit 33 MHz
PCI bus
Fast infrared interface up to 4 Mbps
270 mW typical power consumption at 180 MHz
Operating voltage 1.8 V core, 3.3 V I/O
224-pin FPBGA package
Part Number
Package
Operating
Frequency
µPD30121F1-150-GA1 224-pin FPBGA 150 MHz
µPD30122F1-180-GA1 224-pin FPBGA 168 MHz
Features
VR4120 CPU Core
• MIPS I, II, III ISAs without FPU, LL, LLD, SC, and SCD
instructions
• MIPS16 ASE compliant for compact code density
• Five-stage pipeline running at up to 168 MHz (216
Dhrystone MIPS)
• Single-cycle 32-bit MAC instruction for DSP operations
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