TigerSHARC DSP Hardware Specification, Revision 1.0.2, Link Ports
TigerSHARC DSP Hardware Specification, Revision 1.0.2, Link Ports
TigerSHARC DSP Hardware Specification, Revision 1.0.2, Link Ports
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<strong>Link</strong> Port Communication Protocolpled at the LxCKIN rising edge. If the VERE bit is cleared, the first byte ofthe next quad word follows the last byte of the current word.connectivitychecknext transferacknowledgenext transferbeginsLxCLKOUTLxCLKINLxDAT [7:0]b0 b1 b2 b3 b4 b5b13 b14 b15 b0 b1Figure 8-6. Quad word Completion and a New Quad word BeginningWhen Vere Bit is ClearedThe LxCLKIN, driven by the receiver to the transmitter, is always used as a‘wait’ indication and sometimes used as a connectivity check to ensurethat the receiver is receiving the current transmission.When used as a wait indicator, LxCLKIN is driven low. If LxCLKIN stays low,the transmitter can complete the current quad word, but it can not begin anew quad word transmission. If there are more data to be transmitted, thetransmitter sets the LxCLKOUT to low and waits until LxCLKIN is driven highby the receiver.If LxCLKIN is set high before the 12th edge, there will be back-to-backtransmissions.8 - 12 <strong>TigerSHARC</strong> <strong>DSP</strong> <strong>Hardware</strong> <strong>Specification</strong>