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TigerSHARC DSP Hardware Specification, Revision 1.0.2, Link Ports

TigerSHARC DSP Hardware Specification, Revision 1.0.2, Link Ports

TigerSHARC DSP Hardware Specification, Revision 1.0.2, Link Ports

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<strong>Link</strong> Port Communication Protocolstands for the link pin set—0, 1, 2 or 3. The control signal pins are asfollows:• LxCLKIN and LxCLKOUT – Clock/acknowledge input and output pinsThe LxCLKIN pin is an input that functions as a clock when the linkreceives, and as acknowledge when the link transmits. The LxCLKOUTpin is an output that functions as a clock when the link transmits,and as acknowledge when the link receives.• LxDAT [7:0] – Data bus input and outputThe data are transmitted or received one byte every LxCLK edge.Transfers are of quad words. The transfer begins from byte 0.• LxDIR – <strong>Link</strong> direction indicationThe LxDIR pin is an output that indicates if the link is transmittingor receiving. It is used when the links are buffered. (For example, bydifferential low swing buffers for long twisted-pair wires).LxCLKINLxCLKOUTLxDAT8LxCLKINLxCLKOUTLxDATFigure 8-2. Minimal <strong>Link</strong> Configuration – No Buffering8 - 8 <strong>TigerSHARC</strong> <strong>DSP</strong> <strong>Hardware</strong> <strong>Specification</strong>

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