Design and technology of DEPFET pixel sensors for ... - MPG HLL

2Especially for the inner layer of the TESLA vertexdetector, a lot of partially contradictionary demandshave to be addressed. In order to meet the requiredresolution of primary and secondary vertices, theinnermost detector layer has to be placed at a radiusof 15mm from the interaction point. The pixeldetector at this place has to provide a spatialresolution of less than 5µm. The high occupancy,caused by the beamstrahlung, has to be suppressed bya very fast readout cycle of about 50MHz. To reducemultiple scattering, the material introduced in thedetector must be minimized. This means that no extramaterial for cooling pipes etc. is allowed and,additionally, the sensor substrates must be thinned to~50µm thickness. This results in a reduced signalcharge compared to that generated in standard silicondetectors, where the depletion layer extensions are ofthe order of 500µm. In summary, the ideal vertexdetector for TESLA should fulfill the competingboundary conditions simultaneously: High positionresolution should be achieved with small signalamplitudes, i.e. with thin detectors. Simultaneously,the operation must be fast, e.g. 20ns processing timewith low power dissipation in an environment of asignificant radiation level.The DEPleted Field Effect Transistor structure,abbreviated DEPFET, is a monolithic device which isintegrated onto a high ohmic fully depletable detectorsubstrate [3]. The device is one proposal for adetector design that is consistent to a large extentwith all of the above requirements [4]. While thesystem aspects and the readout concept are discussedin [5], this paper proposes a technology for theproduction of large area DEPFET arrays. Thedifferent operation modes of the device are evaluatedby process and device simulations. A thinningprocedure compatible to the DEPFET process and themodule concept is discussed.2. DEPFET operation principlesThe DEPFET combines detection and amplificationwithin one device [3]. It is based on the sidewarddepletion as used in semiconductor drift chambers,[6]. The principle of operation is shown in Fig.1. Ap-channel MOSFET or JFET (junction field effecttransistor) is integrated onto a silicon detectorsubstrate, which becomes fully depleted by theapplication of a sufficiently high negative voltage to abackside p+ contact. By means of the sidewarddepletion, a potential minimum is formed which isshifted directly underneath the transistor channel at adepth of about 1µm by an additional phosphorousimplantation underneath the external gate. Incidentparticles generate electron-hole pairs within the fullydepleted bulk. While the holes drift into the backcontact, electrons are accumulated in the potentialminimum, called the internal gate resulting, in amodulation of the channel current. The readout isnon-destructive and can be repeated several times.The removal of the signal charge and thermallygenerated electrons from the internal gate is calledClear. A neighboring n+ contact is pulsed at apositive voltage providing a punch-through into theinternal gate. This pulsed clear mechanism isdiscussed below in detail.Internal GateFig.1: Cross section of a DEPFET indicating the operationprinciple.Intrinsic advantages of the DEPFET device are theamplification of the signal charge at the position ofits generation, thus avoiding any charge transferwhere losses could occur. The entire bulk is depletedand sensitive to incident radiation. Therefore, thenon-structured backside can be used as an entrancewindow thereby improving the spectroscopicperformance, especially for low energy photons. Themain advantage of the device is its very small inputcapacitance that provide a very low noise operationeven at room temperature. Fig.2 illustrates theexcellent noise performance with a measured Fe 55spectrum.DEPFET structures can be operated individually,as an integrated on-chip amplifier, for instance in thereadout node of a silicon drift chamber, orcollectively as a pixel array.