Help You to Win! C*Core's Scalable Design Platform - Power.org

C*Core SoC Design Platform• C*Core C9000– High-performance (2.5 DMIPS/MHz ), Out-of-Order, 5-issue / 9-pipeline superscalar RISC CPU– Integrated floating-point unit– L1 caches that support cache coherency in SMP systems– Tightly coupled to an L2 cache controller that supports coherency managementThe Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org.