A Compiler for Parallel Exeuction of Numerical Python Programs on ...

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5.3.3 Multidimensional RCSLMADs with common strides . . . . . . . . . . 445.4 Loop tiling <strong>for</strong> handling large loops . . . . . . . . . . . . . . . . . . . . . . . . 475.5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 486 Loop trans<strong>for</strong>mations <strong>for</strong> AMD GPUs 497 Experimental evaluation 527.1 Matrix multiplication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 537.2 CP benchmark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547.3 Black Scholes option pricing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567.4 5-point stencil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577.5 RPES benchmark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 587.6 Remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 598 Related Work 608.1 Compiling <strong>Python</strong> <strong>for</strong> CPUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 608.2 Array access analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 618.3 <strong>Compiler</strong>s <strong>for</strong> GPGPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 628.4 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 649 Conclusions 65
List <strong>of</strong> Tables2.1 Comparision <strong>of</strong> bandwidth available to Radeon 4870 and Phenom II X4 940 . 177.1 Execution time <strong>for</strong> matrix multiplication benchmark <strong>for</strong> 32-bit floating point(seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547.2 Speedups <strong>for</strong> matrix multiplication using GPU <strong>for</strong> 32-bit floating point overATLAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547.3 Execution time <strong>for</strong> matrix multiplication benchmark <strong>for</strong> 64-bit floating point(seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557.4 Speedups <strong>for</strong> matrix multiplication using GPU <strong>for</strong> 64-bit floating point overATLAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557.5 Execution time <strong>for</strong> CP benchmark (seconds) . . . . . . . . . . . . . . . . . . . 567.6 Speedups <strong>for</strong> CP using GPU over OpenMP . . . . . . . . . . . . . . . . . . . 567.7 Execution time <strong>for</strong> Black-Scholes benchmark (seconds) . . . . . . . . . . . . . 577.8 Speedups <strong>for</strong> Black-Scholes benchmark using GPU over OpenMP . . . . . . . 577.9 Execution time <strong>for</strong> 5-point stencil benchmark (milliseconds) . . . . . . . . . . 58
Page 3 and 4: Examining CommitteeJose Nelson Amar
Page 5 and 6: AbstractModern Graphics Processing
Page 10 and 11: List of Figures2.1
Page 12 and 13: RAMRISCSIMDSPSPMDSSETEXTPUVDVLIWbDE
Page 14 and 15: much lower than equivalent C progra
Page 16 and 17: Chapter 2AMD RV770 architecture <st
Page 18 and 19: Figure 2.1: RV770 Block Diagram. So
Page 20 and 21: 2.2 AMD CAL Programming modelVariou
Page 22 and 23: a context. The predefined names are
Page 24 and 25: 2.3 Hardware execution model2.3.1 P
Page 26 and 27: on the texture unit to bring the da
Page 28 and 29: float4 temp1 = i1[i][threadId.y/4];
Page 30: Chapter 3Python an
Page 33 and 34: Unlike C, NumPy does not impose any
Page 35 and 36: Windows. The module initialization
Page 37 and 38: 3.5.1 Type annotationsType declarat
Page 39 and 40: UnPython generates
Page 41 and 42: Python source code
Page 43 and 44: and optimizations detailed later in
Page 45 and 46: Chapter 5Array access analysisArray
Page 47 and 48: LMADs can represent a wide variety
Page 49 and 50: Figure 5.2: Visualization o
Page 51 and 52: Algorithm 1 solves the data transfe
Page 53 and 54: 0 ≤ j < 5 (5.26)In the example, t
Page 55 and 56: case, assume we had a C array start
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solve for unknown
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approach, the number of</st
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Chapter 6Loop transfor</str
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Algorithm 6 perfor
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with suitable GPU code annotations.
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Table 7.3: Execution time f
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time and the execution time on the
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suite. The serial version o
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However Shedskin does not support e
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thread. Device functions are writte
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Chapter 9ConclusionsThis thesis int
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[14] Francois Labonte, Peter Mattso
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